參數(shù)資料
型號: MB86296
廠商: Fujitsu Limited
英文描述: PCI Graphics Controller Specification
中文描述: PCI圖形控制器規(guī)范
文件頁數(shù): 8/9頁
文件大?。?/td> 3485K
代理商: MB86296
MB86296S<Coral-PA> viii
Specification Manual Rev0.1
13.2.3 Graphics memory interface registers.................................................................................196
13.2.4 Display control register.......................................................................................................199
13.2.5 Video capture registers ......................................................................................................250
13.2.6 Drawing control registers ...................................................................................................266
13.2.7 Drawing mode registers .....................................................................................................269
13.2.8 Triangle drawing registers..................................................................................................285
13.2.9 Line drawing registers........................................................................................................288
13.2.10 Pixel drawing registers.....................................................................................................289
13.2.11 Rectangle drawing registers.............................................................................................289
13.2.12 Blt registers ......................................................................................................................290
13.2.13 High-speed 2D line drawing registers..............................................................................291
13.2.14 High-speed 2D triangle drawing registers........................................................................292
13.2.15 Geometry control register.................................................................................................293
13.2.16 Geometry mode registers.................................................................................................295
13.2.17 Display list FIFO registers................................................................................................302
14. TIMING DIAGRAM
14.1 Host Interface...........................................................................................................................303
14.1.1 PCI Interface ......................................................................................................................303
14.1.2 EEPROM Timing................................................................................................................304
14.1.3 Serial Interface Timing .......................................................................................................305
14.2 I
2
C Interface..............................................................................................................................306
14.3 Graphics Memory Interface......................................................................................................307
14.3.1 Timing of read access to same row address......................................................................307
14.3.2 Timing of read access to different row addresses..............................................................308
14.3.3 Timing of write access to same row address .....................................................................309
14.3.4 Timing of write access to different row addresses .............................................................310
14.3.5 Timing of read/write access to same row address............................................................. 311
14.3.6 Delay between ACTV commands ......................................................................................312
14.3.7 Delay between Refresh command and next ACTV command...........................................312
14.4 Display Timing..........................................................................................................................313
14.4.1 Non-interlace mode............................................................................................................313
14.4.2 Interlace video mode..........................................................................................................314
14.4.3 Composite synchronous signal..........................................................................................315
15. ELECTRICAL CHARACTERISTICS
15.1 Introduction...............................................................................................................................316
15.2 Maximum Rating.......................................................................................................................316
15.3 Recommended Operating Conditions......................................................................................317
15.3.1 Recommended operating conditions .................................................................................317
15.3.2 Note at power-on................................................................................................................318
Immediately after power-on, input clock to the PCLK pin for 10 clk or more. The XRST is taken in
synchronizing with the PCLK.............................................................................................................318
15.4 DC Characteristics....................................................................................................................319
15.4.1 DC Characteristics of PCI Buffer.........................................................................................319
15.4.2 DC Characteristics of other than PCI buffer........................................................................321
15.5 AC Characteristics....................................................................................................................323
15.5.1 Host interface.....................................................................................................................323
15.5.2 I
2
C Interface ........................................................................................................................325
15.5.3 Video interface ...................................................................................................................327
15.5.4 Video capture interface .......................................................................................................328
15.5.5 Graphics memory interface................................................................................................329
303
316
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