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參數(shù)資料
| 型號： | MB86604LPFV |
| 元件分類： | 總線控制器 |
| 英文描述： | SCSI BUS CONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 12/56頁 |
| 文件大?。?/td> | 382K |
| 代理商： | MB86604LPFV |
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MB86604L
(Continued)
Two types of high-speed data transfer:
– Synchronous data transfer (Max. 10 Mbytes/s, max. 32 offsets, 32-step transfer rate)
– Asynchronous data transfer (Max. 5 Mbyte/s)
Transfer parameters (transfer mode, transfer rate, transfer offset) can be set for up to 7 connected devices.
Single-ended transmission type (Maximum cable length: 6 m):
– On-chip single-ended driver/receiver which can drive 48 mA of "L" level output current
– Directly connectable with the SCSI bus
On-chip three-state bidirectional buffers for SCSI REQ and ACK pins (DB7-DB0, DBP, ATN, MSG, C/D,
I/O
pins can be selected from either three-state or open-drain buffer by controlling the TEST pins input.)
Transfer Operation:
Automatic response to selection/reselection (Preset receiving operation can perform at the selection/
reselection.):
– Initiator: Automatically operates until message received without command issue.
– Target: Automatically operates until command received without command issue.
Automatic receiving:
– Initiator: Automatically receives information for new phase to which target transited without command issue.
– Target: Automatically receives message from initiator when initiator generates attention condition.
On-chip 32-byte data register (FIFO) for data phase
On-chip two (send-only and receive-only) 32-byte data buffers for message, command, and status phases
On-chip 16-bit transfer block register and 24-bit transfer byte register enabling 1 Tbytes transfer (1 Tbytes: 16
Mbytes
× 64 k blocks)
On-chip independent data transfer bus enabling the MPU operation during the data transfer
Parity through/generate can be specified.
System Bus Interface:
8-bit or 16-bit separate MPU and DMA buses
Directly connectable with a 80 series or 68 series MPU
Two types of transfer operation:
– Program transfer
– DMA transfer (Burst/Handshake)
Command Set:
Supports sequential commands and programmable commands in addition to ordinary commands
Command queuing (Command can be continuously issued by putting tags to commands in command phase.)
On-chip 256-byte memory for command programming memory and command queuing buffer
Others
Process: CMOS process
Supply Voltage: Single +5 V
Input System Clock: 20 MHz/30 MHz/40 MHz
Package: 100-pin plastic SQFP
相關(guān)PDF資料 |
PDF描述 |
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| MB86605PMT | SCSI BUS CONTROLLER, PQFP144 |
| MB86606PMT | SCSI BUS CONTROLLER, PQFP144 |
| MB86612 | 2 CHANNEL(S), 98.304M bps, SERIAL COMM CONTROLLER, PQFP100 |
| MB86703PF | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP80 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB86606A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:FAST-20 SCSI Protocol Controller |
| MB86606APMT2 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:FAST-20 SCSI Protocol Controller |
| MB86612 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:IEEE 1394 Bus Controller (for MPEG, DVC) |
| MB86612PBT | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:IEEE 1394 Bus Controller (for MPEG, DVC) |
| MB86612PFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:IEEE 1394 Bus Controller (for MPEG, DVC) |
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