參數(shù)資料
型號(hào): MB86832-80PFV-G
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 80 MHz, RISC PROCESSOR, PQFP176
封裝: 24 X 24 MM, 0.50 MM PITCH, EIAJ, PLASTIC, SQFP-176
文件頁(yè)數(shù): 43/54頁(yè)
文件大?。?/td> 269K
代理商: MB86832-80PFV-G
SPARClite Series 32-Bit RISC Embedded Processor
48
Fujitsu Microelectronics, Inc.
Alternating current characteristics are all regulated by CLKIN
(BIU clock), and they do not depend on the CPU internal
operating frequency.
AC Characteristics
VDD = 3.3V ± 0.3V, VSS = 0V, Ta = 0~70°C, P=Period (CLKIN period)
Symbol
Parameter Description
IO_VDD = 5V + 5%
IO_VDD = 3.3V + 0.3V
Units
Min.
Max.
Min.
Max.
t1
CLKIN period
30/25 1
100
30/25 1
100
ns
t2
CLKIN high time
10/8 1
-
10/8 1
-ns
t3
CLKIN low time
10/8 1
-
10/8 1
-ns
t4
CLKIN rise time
-
3
-
3
ns
t5
CLKIN fall time
-
3
-
3
ns
t6
D<31:0>
Output valid delay
-
20/16 1
-20
ns
Output hold
2
-
2
-
ns
ADR<27:2>
Output valid delay
-
20/18 1
-21
ns
Output hold
2
-
2
-
ns
-BE<3:0>
Output valid delay
-
20/16 1
-21
ns
Output hold
2
-
2
-
ns
ASI<3:0>
Output valid delay
-
20/16 1
-21
ns
Output hold
2
-
2
-
ns
-CS<5:0>
Output valid delay
-
20/16 1
-21
ns
Output hold
2
-
2
-
ns
t7
RDWR
Output valid delay
-
18/14 1
-19
ns
Output hold
2
-
2
-
ns
-LOCK
Output valid delay
-
18/14 1
-19
ns
Output hold
2
-
2
-
ns
-AS
Output valid delay
-
18/14 1
-19
ns
Output hold
2
-
2
-
ns
-TIMER_OVF
Output valid delay
-
20/16 1
-21
ns
Output hold
2
-
2
-
ns
-BGRNT
Output valid delay
-
18/14 1
-19
ns
Output hold
2
-
2
-
ns
-PBREQ
Output valid delay
-
18/14 1
-19
ns
Output hold
2
-
2
-
ns
-RDYOUT
(Internal READY mode)
Output valid delay
-
20/16 1
-21
ns
Output hold
2
-
2
-
ns
-RDYOUT
(External READY mode)
Output valid delay
-
15/14 1
-15
ns
Output hold
2
-
2
-
ns
-ERROR
Output valid delay
-
20/14 1
-21
ns
Output hold
2
-
2
-
ns
-PDOWN
Output valid delay
-
20/14 1
-21
ns
Output hold
2
-
2
-
ns
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