參數(shù)資料
型號(hào)： MB86834-120PFV
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 32-bit Embedded Controller
中文描述： 32-BIT, 120 MHz, RISC MICROCONTROLLER, PQFP176
封裝： 24 X 24 MM, PLASTIC, QFP-176
文件頁(yè)數(shù)： 15/82頁(yè)
文件大?。?/td> 1373K
代理商： MB86834-120PFV
MB86830 Series
15
(Continued)
Symbol
(Continued)
Pin name
I/O
Function
NONCACHE#
NON-CACHE-
ABLE
I
Non-cacheable signal.
This pin inputs the signal for exclusion from data caching. The NON-
CACHE# signal is enabled by setting the Cacheability Enable bit (bit 7)
in the Cache/BIU Control Register (CBIR). The “L” input to this pin
when data is read prevents the data and its address from being written
to the data cache (the NONCACHE# signal is disabled at an instruction
fetch). Usually, the NONCACHE# signal must be asserted in the cycle
in which the address strobe signal is asserted. Even if the NON-
CACHE# signal is asserted after a delay of one or more cycles, how-
ever, the signal can be used by setting the Non-cacheable bit (bit 9, bit
8) in the Cache/BIU Control Register (CBIR).
PDOWN#
POWER DOWN
O
Sleep mode (low power consumption mode) output pin.
“L” level input to this pin releases the CPU from the sleep mode (low
power consumption mode) to start operation. Although the pin is an
asynchronous input, it requires an “L” width of at least two clock cycles.
Input “L” to this pin only when the PDOWN# pin is at the “L” level.
WKUP#
WAKE-UP
I
Sleep mode (low power consumption mode) cancel pin.
“L” input to this pin cancels the CPU sleep mode (low power consump-
tion mode), causing the CPU to start operation. Although the pin is an
asynchronous input, it requires an “L” width of at least two clock cycles.
Input the“L” signal to this pin only when PDOWN# is “L”. When
PDOWN# goes “H”, set this pin to "H".
BMREQ#
BURST MODE
REQUEST
O
Burst transfer request pin.
If a cache miss occurs when the Instruction Burst Enable bit or Data
Burst Enable bit in the Bus Control Register (BCR) has been set, the
CPU sets the BMREQ# signal to “L” and requests external memory for
burst transfer. The BMREQ# signal is also asserted when the DRAM
Burst Enable bit in the System Support Control Register (SSCR) has
been set. In this case, however, the external device need not return
the BMACK# signal because the internal DRAM controller responds to
the request.
BMACK#
BURST MODE
ACKNOWL-
EDGE
I
Burst mode acknowledge input.
When a burst transfer request is issued, the burst transfer mode is es-
tablished if the “L” level asserted until the same cycle as the READY#
signal is input to this pin. (It is also established either when the “L” level
is input in the same cycle as the READY# signal or when the “L” level
input in an earlier cycle continues until the same cycle as the READY#
signal.) When the DRAM Burst Enable bit in the System Support Con-
trol Register (SSCR) has been set, the burst transfer mode is estab-
lished even though this pin receives the BMACK# signal.
PBREQ#
PROCESSOR
BUS REQUEST
O
Processor bus request signal.
When the CPU requires accessing an external bus
The PBREQ# signal is asserted to issue a processor bus request to the
external bus master when the CPU requires accessing an external bus
(when it requires external access after a cache miss) while the CPU
has relinquished bus access permission.
相關(guān)PDF資料
PDF描述
MB86834PFV 32-bit Embedded Controller
MB86835 32-bit Embedded Controller
MB86835PMT2 32-bit Embedded Controller
MB86836 32-bit Embedded Controller
MB86836-108PBT 32-bit Embedded Controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB86834PFV 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Embedded Controller
MB86835 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Embedded Controller
MB86835PMT2 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Embedded Controller
MB86836 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Embedded Controller
MB86836-108PBT 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Embedded Controller
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*