參數(shù)資料
型號: MB89625R
廠商: Fujitsu Limited
英文描述: Octal Buffers/Drivers With 3-State Outputs 20-CDIP -55 to 125
中文描述: 8位微控制器專有
文件頁數(shù): 33/61頁
文件大?。?/td> 915K
代理商: MB89625R
33
MB89620R Series
(Continued)
(AV
CC
= V
CC
= 5.0 V, AV
SS
= V
SS
= 0.0 V, T
A
= –40
°
C to +85
°
C)
Value
*1: In the case of the MB89PV620, the current consumed by the connected EPROM and ICE is not included.
The power supply current is measured at the external clock.
*2: For information on t
inst
, see “(4) Instruction Cycle” in “4. AC Characteristics.”
Parameter
Sym-
bol
Pin name
Condition
Unit
Remarks
Min.
Typ.
Max.
Power supply
current
*1
I
CC
V
CC
F
C
= 10 MHz
Normal
operating
mode
t
inst*2
= 0.4
μ
s
9
15
mA
MB89623R/
625R/626R/
627R/T627R/
PV620
10
18
mA
MB89P625/
W625
MB89P627/
W627
I
CCS
F
C
= 10 MHz
Sleep mode
t
inst*2
= 0.4
μ
s
Stop mode
T
A
= +25
°
C
F
C
= 10 MHz,
when starting
A/D conversion
3
4
mA
I
CCH
1
μ
A
I
A
AV
CC
1
3
mA
I
AH
F
C
= 10 MHz,
T
A
= +25
°
C,
when stopping
A/D conversion
1
μ
A
Input
capacitance
C
IN
Other than
AV
CC
, AV
SS
,
V
CC
, and V
SS
f = 1 MHz
10
pF
相關PDF資料
PDF描述
MB89626RP-SH Octal Transparent D-type Latches With 3-State Outputs 20-CDIP -55 to 125
MB89626RPF Octal Transparent D-type Latches With 3-State Outputs 20-CFP -55 to 125
MB89626RPFM Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs 20-LCCC -55 to 125
MB89627R Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs 20-CDIP -55 to 125
MB89627RPF Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs 20-CFP -55 to 125
相關代理商/技術參數(shù)
參數(shù)描述
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