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參數(shù)資料
| 型號： | MB89626RP-SH |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Octal Transparent D-type Latches With 3-State Outputs 20-CDIP -55 to 125 |
| 中文描述： | 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PDIP64 |
| 封裝： | SHRINK, PLASTIC, DIP-64 |
| 文件頁數(shù)： | 17/61頁 |
| 文件大小： | 915K |
| 代理商： | MB89626RP-SH |
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17
MB89620R Series
4. Setting OTPROM Options
The programming procedure is the same as that for the PROM. Options can be set by programming values at
the addresses shown on the memory map.
The relationship between bits and options is shown on the following bit map:
OTPROM option bit map (MB89P625)
Note: Each bit is set to ‘1’ as the initialized value, therefore the pull-up option is not selected.
Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
3FF0
H
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Reset pin
output
1: Yes
0: No
Oscillation
stabilization
time
1: Crystal
0: Ceramic
Power-on
reset
1: Yes
0: No
3FF1
H
P07
Pull-up
1: No
0: Yes
P06
Pull-up
1: No
0: Yes
P05
Pull-up
1: No
0: Yes
P04
Pull-up
1: No
0: Yes
P03
Pull-up
1: No
0: Yes
P02
Pull-up
1: No
0: Yes
P01
Pull-up
1: No
0: Yes
P00
Pull-up
1: No
0: Yes
3FF2
H
P17
Pull-up
1: No
0: Yes
P16
Pull-up
1: No
0: Yes
P15
Pull-up
1: No
0: Yes
P14
Pull-up
1: No
0: Yes
P13
Pull-up
1: No
0: Yes
P12
Pull-up
1: No
0: Yes
P11
Pull-up
1: No
0: Yes
P10
Pull-up
1: No
0: Yes
3FF3
H
P37
Pull-up
1: No
0: Yes
P36
Pull-up
1: No
0: Yes
P35
Pull-up
1: No
0: Yes
P34
Pull-up
1: No
0: Yes
P33
Pull-up
1: No
0: Yes
P32
Pull-up
1: No
0: Yes
P31
Pull-up
1: No
0: Yes
P30
Pull-up
1: No
0: Yes
3FF4
H
P57
Pull-up
1: No
0: Yes
P56
Pull-up
1: No
0: Yes
P55
Pull-up
1: No
0: Yes
P54
Pull-up
1: No
0: Yes
P53
Pull-up
1: No
0: Yes
P52
Pull-up
1: No
0: Yes
P51
Pull-up
1: No
0: Yes
P50
Pull-up
1: No
0: Yes
3FF5
H
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
P64
Pull-up
1: No
0: Yes
P63
Pull-up
1: No
0: Yes
P62
Pull-up
1: No
0: Yes
P61
Pull-up
1: No
0: Yes
P60
Pull-up
1: No
0: Yes
相關PDF資料 |
PDF描述 |
|---|---|
| MB89626RPF | Octal Transparent D-type Latches With 3-State Outputs 20-CFP -55 to 125 |
| MB89626RPFM | Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs 20-LCCC -55 to 125 |
| MB89627R | Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs 20-CDIP -55 to 125 |
| MB89627RPF | Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs 20-CFP -55 to 125 |
| MB89627RPFM | Dual Positive-Edge-Triggered D-type Flip-Flops With Clear And Preset 20-LCCC -55 to 125 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MB89627 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89627PF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89627PFM | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89627P-SH | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89627R | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
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