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參數(shù)資料
| 型號(hào)： | MB89P195PF-100 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 4.2 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | 8.60 X 17.75 MM, 1.27 MM PITCH, PLASTIC, SOP-28 |
| 文件頁(yè)數(shù)： | 15/256頁(yè) |
| 文件大?。?/td> | 1811K |
| 代理商： | MB89P195PF-100 |
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MB89190/190A series
Chapter 5 Time-base Timer
5-11
5.
6 Notes on Using Time-base Timer
Notes when using the time-base timer are explained.
T Notes when using time-base timer
Notes when setting with program
When the interrupt request flag bit (TBTC: TBOF) is 1 and the interrupt request enable bit is Enable
(TBTC: TBIE = 1), control cannot return from the interrupt processing. Always clear the TBOF bit.
Clearing time-base timer
The time-base timer is also cleared when the oscillation stabilization wait time is needed besides
clearing due to the time-base timer initialization bit (TBTC: TBR = 0). Clearing the time-base timer
also clears the watchdog timer.
Using time-base timer as timer for oscillation stabilization wait time
At power-on and in the stop mode, the original oscillation is halting, so the oscillation stabilization wait
time is supplied by the time-base timer after the oscillator operates..
An adequate oscillation stabilization wait time must to be selected based on the type of oscillator
(clock generator). The oscillation cycle immediately after the oscillation is started is unstable, so use
the oscillation stabilization wait time as a guide.
Reference: For details, see
Section 3.6.1.
Notes on resources to which clocks supplied by time-base timer
The clock supplied from the time-base timer is output at the initial state when the time-base timer
counter is cleared, so the H level may become shorter, or the L level may become half a cycle longer
max. The watchdog timer clock is also output at the initial state, but the watchdog timer operates at
the normal cycle because the watchdog timer counter is cleared when the time-base timer counter is
cleared.
Figure 5.6 shows the effect of clearing the time-base timer on the buzzer output.
Fig. 5.6 Effect of Clearing Time-base Timer on Buzzer Output
Counter value
X:
Any value (cleared to 0)
When buzzer register buzzer selection bits (BZCR: BZ2, BZ1, BZ0) set to 001B
(The output clock is obtained by dividing the original oscillation by 4096, so when
the original oscillation is 4.2 MHz, about 1.03 kHz is output.)
XX000
H
XX7FF
H
XX400
H
Clock supplied to
buzzer output
Clearing counter using program (TBTC: TBR = 0)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MB89P558A-201PFV | 8-BIT, OTPROM, 12.5 MHz, MICROCONTROLLER, PQFP100 |
| MB89P558A-201PFT | 8-BIT, OTPROM, 12.5 MHz, MICROCONTROLLER, PQFP100 |
| MB89P558A-202PFV | 8-BIT, OTPROM, 12.5 MHz, MICROCONTROLLER, PQFP100 |
| MB89P558A-202PFT | 8-BIT, OTPROM, 12.5 MHz, MICROCONTROLLER, PQFP100 |
| MB89558APFT-XXX | 8-BIT, MROM, 12.5 MHz, MICROCONTROLLER, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB89P195PF-101 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89P1A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89P475 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89P475-101PFM | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89P475-101PFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
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