參數(shù)資料
型號： MB90214PF
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80
封裝： PLASTIC, QFP-80
文件頁數(shù)： 47/100頁
文件大?。?/td> 1681K
代理商： MB90214PF
MB90210 Series
50
8. DTP/External Interrupt
The data transfer peripheral (DTP) is located between external peripherals and the F2MC-16F CPU. It receives
a DMA request or an interrupt request generated by the external peripherals and reports it to the F2MC-16F
CPU to activate the extended intelligent I/O service or interrupt handler. The user can select two request levels
of “H” and “L” for extended intelligent I/O service or, and four request levels of “H,” “L,” rising edge and falling
edge for external interrupt requests.
(1) Register Configuration
000030H
Address:
Interrupt/DTP enable register
7654
3210
Bit
—
EN0
EN1
EN2
EN3
—
ENIR
(—)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
Read/write
Initial value
→
000031 H
Address:
Interrupt/DTP source register
15
14
13
12
11
10
9
8
Bit
—
ER0
ER1
ER2
ER3
—
EIRR
(—)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
Read/write
Initial value
→
000032 H
Address:
Request level setting register
7654
3210
Bit
LB3
LA0
LB0
LA1
LB1
LA2
LB2
LA3
ELVR
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
Read/write
Initial value
→
Interrupt/DTP enable register (ENIR)
Interrupt/DTP source register (EIRR)
Request level setting register (ELVR)
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