參數(shù)資料
型號: MB90F483PFV
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, LQFP-100
文件頁數(shù): 80/101頁
文件大?。?/td> 1129K
代理商: MB90F483PFV
MB90480 Series
8
(Continued)
Pin No.
Pin name
Circuit
type
Function
LQFP*1
QFP*2
19
20
21
22
P43, P44
F
(CMOS)
This is a general purpose I/O port.
A11, A12
In non-multiplex mode, this pin functions as an external
address pin.
22
24
P45
F*4
(CMOS)
This is a general purpose I/O port.
A13
In non-multiplex mode, this pin functions as an external
address pin.
23
24
25
26
P46, P47
F
(CMOS)
This is a general purpose I/O port.
A14, A15
In non-multiplex mode, this pin functions as an external
address pin.
OUT4/OUT5
Output compare event output pins.
68
70
P50
D
(CMOS)
This is a general purpose I/O port. In external bus mode, this pin
functions as the ALE pin.
ALE
In external bus mode, this pin functions as the address load
enable (ALE) signal pin.
69
71
P51
D
(CMOS)
This is a general purpose I/O port. In external bus mode, this pin
functions as the RD pin.
RD
In external bus mode, this pin functions as the read strobe output
(RD) signal pin.
70
72
P52
D
(CMOS)
This is a general purpose I/O port. In external bus mode, when
the WRE pin in the EPCR register is set to “1”, this pin functions
as the WRL pin.
WRL
In external bus mode, this pin functions as the lower data write
strobe output (WRL) pin. When the WRE bit in the EPCR regis-
ter is set to “0”, this pin functions as a general purpose I/O port.
71
73
P53
D
(CMOS)
This is a general purpose I/O port. In external bus mode with
16-bit bus width, when the WRE bit in the EPCR register is set to
“1”, this pin functions as the WRH pin.
WRH
In external bus mode with 16-bit bus width, this pin functions as
the upper data write strobe output (WRH) pin. When the WRE bit
in the EPCR register is set to “0”, this pin functions as a general
purpose I/O port.
72
74
P54
D
(CMOS)
This is a general purpose I/O port. In external bus mode, when
the HDE bit in the EPCR register is set to “1”, this pin functions
as the HRQ pin.
HRQ
In external bus mode, this pin functions as the hold request input
(HRQ) pin. When the HDE bit in the EPCR register is set to “0”,
this pin functions as a general purpose I/O port.
73
75
P55
D
(CMOS)
This is a general purpose I/O port. In external bus mode, when
the HDE bit in the EPCR register is set to “1”, this pin functions
as the HAK pin.
HAK
In external bus mode, this pin functions as the hold acknowledge
(HAK) pin. When the HDE bit in the EPCR register is set to “0”,
this pin functions as a general purpose I/O port.
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