GENERAL
1-5
1.3
Product Lineup
Table 1-1
lists the Monolith (MB90M405) series product lineup. Functions other than the ROM/RAM capacity
are shared.
Table 1-1 MB90M405 Series Product Lineup
Product name
Classification
ROM capacity
RAM capacity
MB90MV405
Evaluate
Not provided
4 Kbytes
Count of basic instructions: 351
Minimum instruction execution time:
MB90MF408
Flash Type ROM
MB90M408
Mass-produced product (mask ROM)
128 Kbytes
4 Kbytes
MB90M407
96 Kbytes
4 Kbytes
CPU Function
59.5 ns (at original oscillation of 4.2 MHz, with
PLL clock generated by multiplying original
oscillation by 4)
Addressing types: 23
Program patch function: 2-address pointer
Maximum memory space: 16 Mbytes
I/O port (CMOS) 26 pins (all of 26 pins also serve as resource pins)
60 FL output pins can be used (Under LED control, 43 FL output pins and 17 LED
control pins are required).
Enables FL driver control and LED driver control can be performed.
Under FL driver control, the dimmer can be set for both digits and segments.
Can also be used as the clock-synchronous method extended I/O serial.
A dedicated baud rate generator is built-in.
Four channels are built-in (two channels also serve as UART channels).
16-bit reload timer operation (Toggle output or one-shot output can be selected.)
An event count function can be selected. Three channels are built-in.
16-bit output compare x 1 channel (for clearing free-run timer)
16-bit input capture x 2 channels
8-/10-bit resolution x 16 channels (input multiplex)
Minimum conversion time: 6.2 μs (at internal operation of 16 MHz)
The external input clock can be divided and output to the outside.
Clock division rates: 16, 32, 64, or 128 (programmable)
Four independent channels (also serve for A/D input)
Interrupt factor: L
→
H edge, H
→
L edge, L level, or H level
Sleep mode, stop mode, CPU intermittent mode, or pseudo-timer mode
Port
FL Controller
Serial I/O (UART)
16-bit reload timer
16-bit free-run timer
8-/10-bit A/D
converter
Timer clock divider
External interrupt
Low power
consumption mode
Process
Package
Operating voltage
CMOS
QFP-100 (0.65 mm pitch)
PGA256
3.3 V
±
0.3 V(16.8 MHz: 4.2 MHz multiplied by 4)