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參數(shù)資料
| 型號： | MB90M408APF |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-Bit Original Microcontroller |
| 中文描述： | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 0.65 MM PITCH, PLASTIC, QFP-100 |
| 文件頁數(shù)： | 29/64頁 |
| 文件大小： | 310K |
| 代理商： | MB90M408APF |
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MB90M405 Series
29
5.
16-bit Reload Timer
The MB90M405 series has 3 built-in 16-bit reload timer channels. They can be configured with the following
clock modes and counter operation modes :
Clock Modes
Internal Clock Mode : In this mode, the timer counts down in synchronization with the internal clock
Event Count Mode : In this mode, the timer counts down in accordance with external input pulses
Counter Operation Modes
Reload Mode : In this mode, the count setting is reloaded, and the count is repeated
One-shot Mode : In this mode, the count is halted due to an underflow
16-bit Reload Timer Operation Modes
Clock Mode
Counter Operation Mode
Internal Clock Mode
When the count clock setting bits (CSL1, CSL0) of the timer control status register (TMCSR) are set to “00
B
”,
“01
B
”, or “10
B
”, the mode is set to internal clock mode. In internal clock mode, the following operation modes can
be set :
Software trigger operation
If the count enable bit (CNTE) of the timer control status register (TMCSR) is set to “1”, setting the software
trigger bit (TRG) to “1” will initiate count operation.
External trigger input operation
If the count enable bit (CNTE) of the timer control status register (TMCSR) is set to “1”, then when a valid edge
(rising, falling, or both edges can be set) set beforehand in the operation mode setting bits (MOD2, MOD1,
MOD0) is input to the TIN pin, count operation is initiated.
External gate input operation
If the count enable bit (CNTE) of the timer control status register (TMCSR) is set to “1”, then count operation
is conducted while a valid gate input level (“L” or “H” can be set) set beforehand in the operation mode setting
bits (MOD2, MOD1, MOD0) is input to the TIN pin.
Event Count Mode (External Clock Mode)
When the count clock setting bits (CSL1, CSL0) of the timer control status register (TMCSR) are set to “11
B
”,
the mode is set to event count mode (external clock) . If the count enable bit (CNTE) is set to “1”, then when a
valid edge (rising, falling, or both edges can be set) set in the operation mode setting bits (MOD2, MOD1, MOD0)
is input to the TIN pin, count operation is initiated. If an external clock is input at set intervals, then it can also
be used as an interval timer.
Operation Mode
Internal Clock Mode
Reload mode
Software trigger operation
External trigger operation
External gate input operation
One-shot mode
Event Count Mode
(External Clock Mode)
Reload mode
Software trigger operation
One-shot mode
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