![](http://datasheet.mmic.net.cn/330000/MB90P214A_datasheet_16438122/MB90P214A_35.png)
35
MB90210 Series
2. 16-bit Reload Timer 1 (with Event Count Function)
The 16-bit reload timer 1 consists of a 16-bit down counter, a 16-bit reload register, an input pin (TIN), an output
pin (TOUT), and a control register. The input clock can be selected from among three internal clocks and one
external clock. At the output pin (TOUT), the pulses in the toggled output waveform are output in the reload
mode; the rectangular pulses indicating that the timer is counting are in the single-shot mode. The input pin
(TIN) can be used for event input in the event count mode, and for trigger input or gate input in the internal clock
mode.
MB90210 series contains four channels for this timer.
(1) Register Configuration
Timer control status register (TMCSR)
Timer register (TMR)
000039
H
00003B
H
00003D
H
00003F
H
ch.0
ch.1
ch.2
ch.3
Address:
Timer control status register (Upper byte)
000038
H
00003A
H
00003C
H
00003E
H
Read/write
Initial value
ch.0
ch.1
ch.2
ch.3
Address:
Timer control status register (Lower byte)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit
Bit
MDO0
TRG
CNTE
UF
INTE
RELD
OUTL
OUTE
—
MOD1
MOD2
CSL0
CSL1
—
—
—
TMCSRx
(
—
)
(
—
)
(
—
)
(
—
)
(
—
)
(
—
)
(
—
)
(
—
)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
Read/write
Initial value
→
→
→
→
000041
H
000045
H
000049
H
00004D
H
ch.0
ch.1
ch.2
ch.3
Address:
Timer register (Upper byte)
000040
H
000044
H
000048
H
00004C
H
Read/write
Initial value
ch.0
ch.1
ch.2
ch.3
Address:
Timer register (Lower byte)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit
Bit
TMRx
(
R
)
(X)
(
R
)
(X)
(
R
)
(X)
(
R
)
(X)
(
R
)
(X)
(
R
)
(X)
(
R
)
(X)
(
R
)
(X)
(
R
)
(X)
(
R
)
(X)
(
R
)
(X)
(
R
)
(X)
(
R
)
(X)
(
R
)
(X)
(
R
)
(X)
(
R
)
(X)
Read/write
Initial value
→
→
→
→