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| 型號(hào)： | MB90V210 |
| 廠商： | Fujitsu Limited |
| 英文描述： | 8-Bit Proprietary Microcontroller(8位專用微控制器) |
| 中文描述： | 8位微控制器專利（8位專用微控制器） |
| 文件頁數(shù)： | 42/99頁 |
| 文件大小： | 932K |
| 代理商： | MB90V210 |
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MB90210 Series
42
5. A/D Converter
The A/D converter converts the analog input voltage to a digital value. It has the following features:
Conversion time: min.6.125
μ
s per channel (at 16-MHz machine clock)
RC-type successive approximation with built-in sample-and-hold circuit
10-bit or 8-bit resolution
Eight analog input channels programmable for selection
Single conversion mode: Selects and converts one channel.
Scan conversion mode: Converts multiple consecutive channels (up to eight channels programmable).
Consecutive conversion mode: Converts a specified channel repeatedly.
Stop conversion mode: Converts one channel and suspends its own operation until the next activation (allowing
synchronized conversion start).
On completion of A/D conversion, the converter can generate an interrupt request to the CPU. This interrupt
generation can activate the EI
2
OS to transfer the A/D conversion result to memory, making the converter
suitable for continuous operation.
Conversion can be activated by software, external trigger (falling edge), and/or timer (rising edge) as selected.
Use the 16-bit reroad timer 1 channel 3 for the timer.
(1) Register Configuration
000035
H
Address:
Control status register (Upper byte)
000034
H
Address:
Control status register (Lower byte)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit
Bit
MD1
ANE0
ANE1
ANE2
ANS0
ANS1
ANS2
MD0
BUSY
—
STRT
STS0
STS1
PAUS
INTE
INT
ADCS0
ADCS1
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(W)
(0)
(—)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
Read/write
Initial value
Read/write
Initial value
→
→
→
→
000037
H
Address:
Data register (Upper byte)
000036
H
Address:
Data register (Lower byte)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit
Bit
D7
D0
D1
D2
D3
D4
D5
D6
S10
D8
D9
—
—
—
—
—
ADCD0
ADCD1
(W)
(0)
(—)
(—)
(—)
(—)
(—)
(—)
(—)
(—)
(R)
(X)
(R)
(X)
(—)
(—)
(R)
(X)
(R)
(X)
(R)
(X)
(R)
(X)
(R)
(X)
(R)
(X)
(R)
(X)
(R)
(X)
Read/write
Initial value
Read/write
Initial value
→
→
→
→
Control status register (ADCS1 and ADCS0)
Data registers (ADCD1 and ADCD0)
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