![](http://datasheet.mmic.net.cn/330000/MB90P224BPF_datasheet_16438137/MB90P224BPF_37.png)
37
MB90220 Series
2. 16-bit Reload Timer (with Event Count Function)
The 16-bit reload timer 1 consists of a 16-bit down counter, a 16-bit reload register, an input pin (TIN), an output
pin (TOT), and a control register. The input clock can be selected from among three internal clocks and one
external clock. At the output pin (TOT), the pulses in the toggled output waveform are output in the reload mode;
the rectangular pulses indicating that the timer is counting are in the single-shot mode. The input pin (TIN) can
be used for event input in the event count mode, and for trigger input or gate input in the internal clock mode.
The MB90220 series has six channels for this timer.
(1) Register Configuration
000041
H
000043
H
000045
H
000047
H
000049
H
00004B
H
—
—
—
—
CSL1
CSL0
MOD2
bit15
bit14
bit13
bit12
bit11
bit10
bit9
MOD1
bit8
(—)
(R/W)
(—)
(—)
(—)
(R/W)
(R/W)
(R/W)
MOD0
OUTE
OUTL
RELD
INTE
UF
CNTE
bit7
bit6
bit5
bit4
bit3
bit2
bit1
TRG
bit0
000040
H
000042
H
000044
H
000046
H
000048
H
00004A
H
001F31
H
001F35
H
001F39
H
001F3D
H
001F41
H
001F45
H
001F30
H
001F34
H
001F38
H
001F3C
H
001F40
H
001F44
H
001F33
H
001F37
H
001F3B
H
001F3F
H
001F43
H
001F47
H
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(W)
(W)
(W)
(W)
(W)
(W)
(W)
(W)
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
TMCSR0
TMCSR1
TMCSR2
TMCSR3
TMCSR4
TMCSR5
- - - - 0000
B
00000000
B
TMCSR0
TMCSR1
TMCSR2
TMCSR3
TMCSR4
TMCSR5
TMR0
TMR1
TMR2
TMR3
TMR4
TMR5
XXXXXXXX
B
TMR0
TMR1
TMR2
TMR3
TMR4
TMR5
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
XXXXXXXX
B
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
XXXXXXXX
B
TMRLR0
TMRLR1
TMRLR2
TMRLR3
TMRLR4
TMRLR5
Register name Address
Register name Address
Register name Address
Register name Address
Register name Address
Initial value
Initial value
(R/W)
(R/W)
(R/W)
(R/W)
(R/W)
(R/W)
(R/W)
(R/W)
Initial value
Initial value
Initial value
Timer Control Status Register 0 to 5 (TMCSR0 to TMCSR5)
16-bit Timer Register 0 to 5 (TMR0 to TMR5)
16-bit Timer Reload Register 0 to 5 (TMRLR0 to TMRLR5)