參數(shù)資料
型號: MB91354APMT
元件分類: 微控制器/微處理器
英文描述: 32-BIT, MROM, 50 MHz, RISC MICROCONTROLLER, PQFP176
封裝: 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-176
文件頁數(shù): 46/140頁
文件大?。?/td> 3803K
代理商: MB91354APMT
MB91350A Series
14
DS07-16503-5E
(Continued)
Pin no.
Pin name
I/O
circuit
type*3
Function
LQFP*1
LQFP*2
130
SCK4
D
Clock I/O for UART4.
This function is valid when serial I/O4 clock output is enabled or
when an external clock input is used.
PG2
General-purpose I/O port.
This function is valid when serial I/O4 clock output is disabled
or when an external clock input is not used.
131
SI5
D
Data input for serial I/O5.
Since this input is always used when serial I/O5 input is
operating, output using the port must be stopped beforehand
unless this operation is the intended operation.
PG3
General-purpose I/O port
132
SO5
D
Data output from serial I/O5.
This function is valid when serial I/O5 data output is enabled.
PG4
General-purpose I/O port.
This function is valid when serial I/O5 data output is disabled.
133
SCK5
D
Clock I/O for serial I/O5.
This function is valid when serial I/O5 clock output is enabled or
when an external shift clock input is used.
PG5
General-purpose I/O port.
This function is valid when serial I/O5 clock output is disabled
or when an external clock input is not used.
134
51
NMI
H
NMI (non-maskable interrupt) input
135
61
X1A
B
Clock (oscillation) output (sub clock)
137
60
X0A
B
Clock (oscillation) input (sub clock)
138 to 140
52 to 54
MD2 to MD0
H
Mode pins 2 to 0.
These pins set the basic operating mode. Connect the pins to
VCC or VSS.
Input circuit type :
The production version (MASK ROM version) is the "H" type.
The Flash ROM version is the "J" type.
J
141
58
X0
A
Clock (oscillation) input (main clock)
143
57
X1
A
Clock (oscillation) output (main clock)
144
55
INIT
I
External reset input
147
DREQ2
C
DMA external transfer request input.
Since this input is always used when it is selected as the DMA
activation source, output using the port must be stopped
beforehand unless this operation is the intended operation.
PC0
General-purpose I/O port
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