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參數(shù)資料
| 型號(hào)： | MB91F467MAPMC-GSE1 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP216 |
| 封裝： | 24 X 24 MM, 1.70 MM HEIGHT, 0.40 MM PITCH, LEAD FREE, PLASTIC, QFP-216 |
| 文件頁數(shù)： | 47/128頁 |
| 文件大?。?/td> | 3125K |
| 代理商： | MB91F467MAPMC-GSE1 |
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MB91460M Series
DS07-16613-2E
25
Operation at Start-up
Be sure to execute the setting initialized reset (INIT) with INITX pin immediately after start-up.
Hold the “L” level input to the INITX pin during the stabilization wait time immediately after the power on to ensure
the stabilization wait time as required by the oscillator circuit (the stabilization wait time is initialized to the
minimum value when INIT is asserted to reset using the INITX pin).
Note on oscillator input at power-on
At power-on, ensure that the clock is input until the oscillator stabilization wait time has elapsed.
Notes on operating in PLL clock mode
If the oscillator is disconnected or the clock input stops when the PLL clock is selected, the microcontroller may
continue to operate at the free-running frequency of the self-oscillating circuit of the PLL. However, this self-
running operation cannot be guaranteed.
Notes on using external clock
When using an external clock, simultaneously supply the clock signal to the X1 (X1A) pin and a clock signal with
the reverse phase to X0(X0A).
However, the external clock must not be used while the microcontroller is in stop mode (oscillator stop mode).
The X1 pin outputs the H level and stops in STOP mode.
Setting external bus
This model guarantees the maximum frequency of 40 MHz for the external clock operation.
Setting the base clock frequency to the maximum operation frequency without changing the initial value of DIVR1
(external bus base clock division setting register) sets the external bus frequency that is not guaranteed.
Before changing the base clock frequency, set SYSCLK not to exceed the maximum guaranteed frequency.
The AC ratings cannot be guaranteed if a pull-up resistor is connected to the pin serving as an external bus pin.
Clock control
Input the “L” signal to INIT to assure the clock oscillation stabilization wait time.
Immediately after power-on or when returning from shutdown by INITX input, keep the "L" level input to the INITX
pin for oscillation stabilization wait time (8ms) in order to secure stabilization wait for the built-in regulator or
oscillation stabilization wait time for the oscillation circuit.
Switching multiplexed ports
Use PFR (port function register) to switch between the use as a PORT and the multiplexed port.
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| MB91F467PAPMC-GSE2 | 制造商:FUJITSU 功能描述: |
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