參數(shù)資料
型號(hào): MB91FV130CR-ES
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 33 MHz, RISC MICROCONTROLLER, CPGA299
封裝: CERAMIC, PGA-299
文件頁數(shù): 118/123頁
文件大小: 1331K
代理商: MB91FV130CR-ES
MB91133/MB91F133
94
(2) Reset Input Standards
(MASK Model VCC5
= AVCC = DAVC = 5.0 V ± 10%, VCC3 = 2.7 V to 3.6 V, VSS = AVSS = 0 V, TA = 40 °C to +70 °C)
(FLASH Model VCC5
= AVCC = DAVC = 5.0 V ± 10%, VCC3 = 3.0 V to 3.6 V, VSS = AVSS = 0 V, TA = 40 °C to +70 °C)
(3) Power On Reset
(MASK Model VCC5
= AVCC = DAVC = 5.0 V ± 10%, VCC3 = 2.7 V to 3.6 V, VSS = AVSS = 0 V, TA = 40 °C to +70 °C)
(FLASH Model VCC5
= AVCC = DAVC = 5.0 V ± 10%, VCC3 = 3.0 V to 3.6 V, VSS = AVSS = 0 V, TA = 40 °C to +70 °C)
Parameter
Symbol
Pin
name
Condi-
tions
Value
Unit
Remarks
Min.
Max.
Reset input time
tRSTL
RST
tCP
× 5
ns
Parameter
Sym-
bol
Pin
name
Conditions
Value
Unit
Remarks
Min.
Max.
Power startup time
fR
VCC
20
ms
Power cut time
tOFF
2
ms
Waiting time for oscillation
stabilization
tOSC
213 tC
ns
RST
tRSTL
0.2 VCC
VhhR
tR
0.9
× VCC3
0.2 V
tOFF
VCC
VSS
VCC
RST
tRSTL
Holding RAM data
tOSC (waiting for oscillation stabilization)
If the power voltage is changed rapidly, “Power On Reset” may be initiated. To start up smoothly,
controlling any voltage fluctuations that may occur during operation is recommended.
Controling inclination at initiation to 50
mV/ms or less is recommended.
When power is turned on, start while the RST pin
is set to “L” level, after which wait for tRSTL minutes
and change the level to “H” once the VCC power
level is reached.
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