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參數(shù)資料
| 型號(hào)： | MB91V280CR |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 32 MHz, RISC MICROCONTROLLER, CPGA401 |
| 封裝： | CERAMIC, PGA-401 |
| 文件頁(yè)數(shù)： | 51/85頁(yè) |
| 文件大?。?/td> | 1090K |
| 代理商： | MB91V280CR |
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MB91270/280 Series
55
(Continued)
*1 : Pins become inputs and can be used to wakeup from STOP mode when the corresponding external interrupt
is enabled in ENIR and the pin is selected as an external interrupt input pin in EISSR.
*2 : Outputs go to Hi-Z at power on or while the INIT pin is at the “L” level starting from the falling edge on the INIT pin.
Input enabled
: This indicates that the input function is available in this state.
Input disconnect
: Disconnects the external input at the input gate immediately adjacent to the pin .
An "L" level is passed to internal circuits.
Output Hi-Z
: This makes the pin go to high-impedance by preventing the pin drive transistor from
driving.
Output is maintained
: Indicates that pins maintain the output level they had prior to changing to this mode.
In other words, the pin outputs the value from the internal peripheral if the internal
peripheral that uses the output is operating, and the pin maintains its output level if the
pin is set as a port.
Maintain previous state : Indicates that output pins maintain the output level they had prior to changing to this
mode, and input pins continue to operate.
Port
name
Specified
function
name
At initialization
Sleep
Sub sleep
In stop mode
In RTC mode
Remarks
Func-
tion
name
Internal ROM mode
vector (MD2-0
= 000)
HIZ
= 0HIZ = 1
INIT
RST
PG0
AN24
PG0
Output Hi-Z
Input
enabled
Output Hi-Z
Input
enabled
Maintain
previous state
Maintain
previous state
Output Hi-Z
Input
disconnect
*1
PG1
AN25
PG1
PG2
AN26
PG2
PG3
AN27
PG3
PG4
AN28
PG4
PG5
AN29
PG5
PG6
AN30
PG6
PG7
AN31
PG7
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