參數(shù)資料
型號: MB95107BBGL
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 16.25 MHz, MICROCONTROLLER, PBGA96
封裝: 6 X 6 MM, 1.30 MM HEIGHT, 0.50 MM PITCH, PLASTIC, FBGA-96
文件頁數(shù): 23/80頁
文件大?。?/td> 2746K
代理商: MB95107BBGL
MB95100B Series
DS07-12617-3E
3
■ PRODUCT LINEUP
(Continued)
Part number
Parameter
MB95107B
MB95F108BS/
MB95F108BW
MB95D108BS/
MB95D108BW
Type
MASK ROM
product
Flash memory
product
Flash memory
product
ROM capacity
48 K bytes
60 K bytes
RAM capacity
2 K bytes
FRAM capacity
No
2 K bytes
Reset output
No
Op
tio
n
*
3
Clock system
Selectable
Single/Dual clock*1
Single/Dual clock*2
Low voltage
detection reset
No
CPU functions
Number of basic instructions
: 136
Instruction bit length
: 8 bits
Instruction length
: 1 to 3 bytes
Data bit length
: 1, 8, and 16 bits
Minimum instruction execution time
: 61.5 ns (at machine clock frequency 16.25 MHz)
Interrupt processing time
: 0.6
μs (at machine clock frequency 16.25 MHz)
Pe
rip
h
e
ra
lfu
nct
ion
s
General purpose
I/O ports
Single clock product : 55 ports (N-ch open drain *4 : 4/6 ports, CMOS : 49 ports)
Dual clock product
: 53 ports (N-ch open drain *4 : 4/6 ports, CMOS : 47 ports)
Timebase timer
(1 channel)
Interrupt cycle : 0.5 ms, 2.1 ms, 8.2 ms, 32.8 ms (at main oscillation clock 4 MHz)
Watchdog timer
Reset generated cycle
At main oscillation clock 10 MHz
: Min 105 ms
At sub oscillation clock 32.768 kHz (for dual clock product) : Min 250 ms
Wild register
Capable of replacing 3 bytes of ROM data
I2C
(1 channel)
Master/slave sending and receiving
Bus error function and arbitration function
Detecting transmitting direction function
Start condition repeated generation and detection functions
Built-in wake-up function
UART/SIO
(1 channel)
Data transfer capable in UART/SIO
Full duplex double buffer, Variable data length (5/6/7/8-bit), built-in baud rate generator
NRZ type transfer format, error detected function
LSB-first or MSB-first can be selected.
Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable
LIN-UART
(1 channel)
Dedicated reload timer allowing a wide range of communication speeds to be set.
Full duplex double buffer.
Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable
LIN functions available as the LIN master or LIN slave.
8/10-bit A/D
converter
(12 channels)
8-bit or 10-bit resolution can be selected.
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