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參數(shù)資料
| 型號(hào)： | MB95F378EPMC2-G-SNE2 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 16.25 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64 |
| 文件頁(yè)數(shù)： | 63/76頁(yè) |
| 文件大?。?/td> | 2597K |
| 代理商： | MB95F378EPMC2-G-SNE2 |
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MB95310L/370L Series
66
DS07-12628-1E
(2) Notes on Using the A/D Converter
External impedance of analog input and its sampling time
The A/D converter has a sample and hold circuit. If the external impedance is too high to keep sufficient
sampling time, the analog voltage charged to the capacitor of the internal sample and hold circuit is
insufficient, adversely affecting A/D conversion precision. Therefore, to satisfy the A/D conversion precision
standard, considering the relationship between the external impedance and minimum sampling time, either
adjust the register value and operating frequency or decrease the external impedance so that the sampling
time is longer than the minimum value. In addition, if sufficient sampling time cannot be secured, connect
a capacitor of about 0.1 F to the analog input pin.
A/D conversion error
As |VCC
VSS| decreases, the A/D conversion error increases proportionately.
Note: The values are reference values.
2.7 V
VCC
3.6 V : R
1.7 k
Ω (Max),C
C
14.5 pF (Max)
<
1.8 VVCC
2.7 V : R
8.4 k
Ω (Max),
25.2 pF (Max)
≤
≤≈
≈
≈≈
Comparator
Analog input
During sampling: ON
R
C
Analog input equivalent circuit
[External impedance = 0 k
Ω to 100 kΩ]
Exter
n
a
limped
a
nce
[k
Ω
]
Exter
n
a
limped
a
nce
[k
Ω
]
Minimum sampling time [
μs]
Minimum sampling time [
μs]
[External impedance = 0 k
Ω to 20 kΩ]
100
90
80
70
60
50
40
30
20
10
0
20
18
16
14
12
10
8
6
4
2
0
5
10
15
20
25
30
35
1
02
3
4
(VCC
≥ 2.7 V)
(VCC
≥ 1.8 V)
(VCC
≥ 2.7 V)
Relationship between external impedance and minimum sampling time
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