參數(shù)資料
型號(hào)： MB95F378LPMC2-G-SNE2
廠商： FUJITSU LTD
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 16.25 MHz, MICROCONTROLLER, PQFP64
封裝： 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64
文件頁(yè)數(shù)： 61/76頁(yè)
文件大?。?/td> 2597K
代理商： MB95F378LPMC2-G-SNE2
MB95310L/370L Series
64
DS07-12628-1E
(Continued)
*1: R represents the pull-up resistor of the SCL0 and SDA0 lines, and C the load capacitor of the SCL0 and
SDA0 lines.
*2: See “(2) Source Clock/Machine Clock” for tMCLK.
m represents the CS4 bit and CS3 bit (bit4 and bit3) in the I2C clock control register (ICCR0).
n represents the CS2 bit to CS0 bit (bit2 to bit0) in the I2C clock control register (ICCR0).
The actual timing of I2C is determined by the values of m and n set by the machine clock (tMCLK) and the
CS4 to CS0 bits in the ICCR0 register.
Standard-mode:
m and n can be set to values in the following range: 0.9 MHz < tMCLK (machine clock) < 10 MHz.
The usable frequencies of the machine clock are determined by the settings of m and n as shown below.
(m, n) = (1, 8)
: 0.9 MHz < tMCLK
≤ 1 MHz
(m, n) = (1, 22), (5, 4), (6, 4), (7, 4), (8, 4)
: 0.9 MHz < tMCLK
≤ 2 MHz
(m, n) = (1, 38), (5, 8), (6, 8), (7, 8), (8, 8)
: 0.9 MHz < tMCLK
≤ 4 MHz
(m, n) = (1, 98)
: 0.9 MHz < tMCLK
≤ 10 MHz
Fast-mode:
m and n can be set to values in the following range: 3.3 MHz < tMCLK (machine clock) < 10 MHz.
The usable frequencies of the machine clock are determined by the settings of m and n as shown below.
(m, n) = (1, 8)
: 3.3 MHz < tMCLK
≤ 4 MHz
(m, n) = (1, 22), (5, 4)
: 3.3 MHz < tMCLK
≤ 8 MHz
(m, n) = (6, 4)
: 3.3 MHz < tMCLK
≤ 10 MHz
相關(guān)PDF資料
PDF描述
MB95F376EPMC1-G-SNE2 8-BIT, FLASH, 16.25 MHz, MICROCONTROLLER, PQFP64
MB95F374EPMC1-G-SNE2 8-BIT, FLASH, 16.25 MHz, MICROCONTROLLER, PQFP64
MB95F398HPMC-G-SNE2 8-BIT, FLASH, 16.25 MHz, MICROCONTROLLER, PQFP48
MB95F394KPMC-G-SNE2 8-BIT, FLASH, 16.25 MHz, MICROCONTROLLER, PQFP48
MB95F398KWQN-G-SNE1 8-BIT, FLASH, 16.25 MHz, MICROCONTROLLER, PQCC48
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