參數(shù)資料
型號(hào)： MB95F414HPMC-G-SNE2
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-80
文件頁(yè)數(shù)： 12/76頁(yè)
文件大?。?/td> 3707K
代理商： MB95F414HPMC-G-SNE2
MB95410H/470H Series
2
DS702-00004-0v01-E
(Continued)
I2C
Built-in wake-up function
External interrupt
Interrupt by edge detection (rising edge, falling edge, and both edges can be selected)
Can be used to wake up the device from different low power consumption (standby) modes
8/10-bit A/D converter
8-bit or 10-bit resolution can be selected
LCD controller (LCDC)
On MB95F414H/F414K/F416H/F416K/F418H/F418K, LCD output can be selected from 40 SEG
× 4 COM
to 36 SEG
× 8 COM.
On MB95F474H/F474K/F476H/F476K/F478H/F478K, LCD output can be selected from 32 SEG
× 4 COM
to 28 SEG
× 8 COM.
Internal divider resistor whose resistance value can be selected from 10 k
Ω or 100 kΩ through software
Interrupt in sync with the LCD module frame frequency
Blinking function
Inverted display function
Low power consumption (standby) modes
Stop mode
Sleep mode
Watch mode
Time-base timer mode
I/O port
MB95F414H/F416H/F418H (maximum no. of I/O ports: 74)
General-purpose I/O ports (N-ch open drain)
: 3
General-purpose I/O ports (CMOS I/O)
: 71
MB95F414K/F416K/F418K (maximum no. of I/O ports: 75)
General-purpose I/O ports (N-ch open drain)
: 4
General-purpose I/O ports (CMOS I/O)
: 71
MB95F474H/F476H/F478H (maximum no. of I/O ports: 58)
General-purpose I/O ports (N-ch open drain)
: 3
General-purpose I/O ports (CMOS I/O)
: 55
MB95F474K/F476K/F478K (maximum no. of I/O ports: 59)
General-purpose I/O ports (N-ch open drain)
: 4
General-purpose I/O ports (CMOS I/O)
: 55
On-chip debug
1-wire serial control
Serial writing supported (asynchronous mode)
Hardware/software watchdog timer
Built-in hardware watchdog timer
Built-in software watchdog timer
Low-voltage detection reset circuit
Built-in low-voltage detector
Clock supervisor counter
Built-in clock supervisor counter function
Programmable port input voltage level
CMOS input level / hysteresis input level
Dual operation Flash memory
The erase/write operation and the read operation can be executed in different banks (upper bank/lower
bank) simultaneously.
Flash memory security function
Protects the content of the Flash memory
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