參數(shù)資料
型號(hào): MB96F338YSAPMC-GSE2
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 48 MHz, MICROCONTROLLER, PQFP144
封裝: 20 X 20 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LFQFP-144
文件頁數(shù): 30/134頁
文件大?。?/td> 3710K
代理商: MB96F338YSAPMC-GSE2
MB96330 Series
FME-MB96330 rev 4
125
2. Frequency dependency of power supply currents in PLL Run mode
The following diagrams show the current consumption of samples with typical wafer process parameters in PLL
Run mode at different frequencies and Flash timing settings.
Measurement conditions:
VCC = AVCC = 5.0V
Ta = 25C
fCLKS1 = fCLKB or fCLKS1 = 2*fCLKB as described in diagram
fCLKS2 = fCLKS1
fCLKP1 = fCLKB
fCLKP2 = fCLKB/2
fCLKP3 = fCLKB or fCLKP3 = 2*fCLKB as described in diagram
Core voltage at 1.8V (VRCR:HPM[1:0] = 10B) or 1.9V (VRCR:HPM[1:0] = 11B) as described in diagram
Main clock = 4MHz external clock
Flash memory timing settings:
MTCRA=2128H/2208H (0 Flash wait states, fCLKS1 = 2*fCLKB)
MTCRA=0239H/2129H (1 Flash wait state, fCLKS1 = fCLKB)
MTCRA=4C09H/6B09H (1 Flash wait state, fCLKS1 = 2*fCLKB)
MTCRA=233AH (2 Flash wait states, fCLKS1 = fCLKB)
Average Flash access rate (number of read accesses to the Flash per CLKB clock cycle, no buffer hit):
0 Flash wait states: 0.5
1 Flash wait states: 0.33
2 Flash wait states: 0.25
MB96F33xY/R PLL Run mode currents
0
5
10
15
20
25
30
35
40
45
50
55
60
0
4
8
12
16
20
24
28
32
36
40
44
48
CLKB/CLKP1 (MHz)
ICCP
L
(mA)
1 Flash wait state
(CLKS1=2*CLKB, CLKP3=CLKB, 1.9V)
1 Flash wait state
(CLKS1=2*CLKB, CLKP3=CLKB, 1.8V)
0 Flash wait states
(CLKS1=CLKP3=2*CLKB, 1.8V)
1 Flash wait state
(CLKS1=CLKP3=CLKB, 1.8V)
2 Flash wait states
(CLKS1=CLKP3=CLKB, 1.8V)
2 Flash wait states
(CLKS1=CLKP3=CLKB, 1.9V)
: Specified in "DC characteristics"
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