![](http://datasheet.mmic.net.cn/330000/MB98D81223_datasheet_16438354/MB98D81223_10.png)
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MB98D81123/81223-15
8. Automated Sector Erase Capability
– We can execute the erase operation on any sectors by 6 bus cycle operation.
– A time-out of 50
μ
s (typ.) from the rising edge of the last Sector Erase command will initiate the Sector Erase
command(s).
– Multiple sectors in a chip can be erased concurrently. This sequence is followed with writes of 30H to addresses
in other sectors desired to be concurrently erased. The time between writes 30H must be less than 50
μ
s,
otherwise that command will not be accepted. Any command other than Sector Erase or Erase Suspend
during this time-out period will reset the chip to Read mode. The automated sector erase begins after the 50
μ
s (typ.) time out from the rising edge of WE# pulse for the last Sector Erase command pulse. Whether the
sector erase window is still open can be monitored with D3 and D11.
– Sector Erase does not require the user to program the chip prior to erase. The chip automatically programs
“0” to all memory locations in the sector(s) prior to electrical erase. The system is not required to provide any
controls or timing during these operations.
– The card returns to Common Memory Read mode automatically after the chip erasing is completed.
– Whether or not sector erase operation is completed successfully can be checked by sequence flug with
BUSY#, Data# Polling or Toggle Bit function. The sequence flug must be read from the address of the sector
involved in erase operation. See “WRITE OPERATION STATUS”.
9. Erase Suspend
– Erase Suspend command allows the user to interrupt the sector erase operation and then do data reads or
program from or to a non-busy sector in the chip which has the sector(s) suspended erase. This command
is applicable only during the sector erase operation (including the sector erase time-out period after the sector
erase commands 30H) and will be ignored if written during the chip erase or programming operation. Writing
this command during the time-out will result in immediate termination of the time-out period. The addresses
are “don’t cares” in wrinting the Erase Suspend or Resume commands in the chip.
– When the Erase Suspend command is written during a Sector Erase operation, the chip will enter the Erase
Suspend Read mode. User can read the data from other sectors than those in suspention. The read operation
from sectors in suspention results D
2
/D
10
toggling. User can program to non-busy sectors by writing program
commands.
– A read from a sector being erase suspended may result in invalid data.
10. Intelligent Identifier (ID) Read Mode
– Each common memory can execute an Intelligent Identifier operation, initiated by writing Intelligent ID com-
mand (90H). Following the command write, a read cycle from address 00H retrieves the manufacture code,
and a read cycle from address 01H returns the device code as follows. To terminate the operation, it is
necessary to write Read/Reset command.
11. Hardware Reset
– The Card may be reset by driving the RESET# pin to VIL. The RESET# pin must be kept High (VIL) for at
least 500 ns. Any operation in progress will be terminated and the card will be reset to the read mode 20
μ
s
after the RESET# pin is driven Low. If a hardware reset occurs during a program operation, the data at that
particular location will be indeterminate.
– When the RESET# pin is Low and the internal reset is complete, the Card goes to standby mode and cannot
be accessed. Also, note that all the data output pins are High-Z for the duration of the RESET# pulse. Once
the RESET# pin is taken high, the Card requires 500 ns of wake up time until outputs are valid for read access.
– If hardware reset occurs during a erase operation, there is a possibility that the erasing sector(s) cannot be
used.