參數(shù)資料
型號(hào): MBM29DL162TD
廠商: Fujitsu Limited
英文描述: 16M (2M x 8/1M x 16) BIT Dual Operation
中文描述: 16米(2米x 8/1M × 16)位雙操作
文件頁數(shù): 49/75頁
文件大?。?/td> 1089K
代理商: MBM29DL162TD
MBM29DL16XTE/BE
-70/90/12
49
(Continued)
Note: 1.This does not include the preprogramming time.
2.This timing is for Sector Group Protection operation.
I
ERASE AND PROGRAMMING PERFORMANCE
I
PIN CAPACITANCE
Note: Test conditions T
A
= 25°C, f = 1.0 MHzs
Parameter Symbols
Description
70
90
12
Unit
JEDEC
Standard
t
CSP
CE Setup Time to WE Active (Note 2)
Min.
4
4
4
μs
t
RB
Recover Time From RY/BY
Min.
0
0
0
ns
t
RP
RESET Pulse Width
Min.
500
500
500
ns
t
RH
RESET High Level Period Before Read
Min.
200
200
200
ns
t
FLQZ
BYTE Switching Low to Output High-Z
Max.
30
30
40
ns
t
FHQV
BYTE Switching High to Output Active
Max.
70
90
120
ns
t
BUSY
Program/Erase Valid to RY/BY Delay
Max.
90
90
90
ns
t
EOE
Delay Time from Embedded Output Enable
Max.
70
90
120
ns
t
TOW
Erase Time-out Time
Min.
50
50
50
μs
t
SPD
Erase Suspend Transition Time
Max.
20
20
20
μs
Parameter
Limits
Unit
Comments
Min.
Typ.
Max.
Sector Erase Time
1
10
s
Excludes programming time
prior to erasure
Word Programming Time
16
360
μ
s
Excludes system-level
overhead
Byte Programming Time
8
300
μ
s
Chip Programming Time
50
s
Excludes system-level
overhead
Program/Erase Cycle
100,000
cycle
Parameter
Symbol
Parameter Description
Test Setup
Typ.
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0
6
7.5
pF
C
OUT
Output Capacitance
V
OUT
= 0
8.5
12
pF
C
IN2
Control Pin Capacitance
V
IN
= 0
8
10
pF
C
IN3
WP/ACC Pin Capacitance
V
IN
= 0
17
18
pF
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