參數(shù)資料
型號: MBM29DL324TE12PBT
廠商: FUJITSU LTD
元件分類: DRAM
英文描述: 32M (4M x 8/2M x 16) BIT Dual Operation
中文描述: 2M X 16 FLASH 3V PROM, 120 ns, PBGA63
封裝: PLASTIC, FBGA-63
文件頁數(shù): 71/80頁
文件大小: 1588K
代理商: MBM29DL324TE12PBT
MBM29DL32XTE/BE
-80/90/12
71
DQ
7
= Data
No
No
DQ
7
= Data
DQ
5
= 1
Yes
Yes
No
Read
(DQ
0
to DQ
7
)
Addr. = VA
Read
(DQ
0
to DQ
7
)
Addr. = VA
Yes
Start
Fail
Pass
Figure 24 Data Polling Algorithm
Note: DQ
7
is rechecked even if DQ
5
= “1” because DQ
7
may change simultaneously with DQ
5
.
VA = Byte address for programming
= Any of the sector addresses within
the sector being erased during
sector erase or multiple sector
erases operation
= Any of the sector addresses within
the sector not being protected
during chip erase
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