參數(shù)資料
型號(hào)： MBM29DL640E80
廠商： Fujitsu Limited
英文描述： 64 M (8 M X 8/4 M X 16) BIT Dual Operation
中文描述： 64米（8的MX 8 / 4的MX 16）位雙操作
文件頁(yè)數(shù)： 33/71頁(yè)
文件大小： 913K
代理商： MBM29DL640E80
MBM29DL640E
80/90/12
33
method because other than the Hidden ROM mode, it is the same as the sector group protect previously
mentioned. Refer to “Function Explanation Secor Group Protection” for details of the sector group protect setting.
Take note that other sector groups will be affected if an address other than those for the Hidden ROM area is
selected for the sector group address, so please be careful. Pay close attention that once it is protected, protection
CANNOT BE CANCELLED.
Write Operation Status
Detailed in Table 12 are all the status flags which can determine the status of the bank for the current mode
operation. The read operation from the bank which doesn’t operate Embedded Algorithm returns data of memory
cells. These bits offer a method for determining whether an Embedded Algorithm is properly completed. The
information on DQ
2
is address-sensitive. This means that if an address from an erasing sector is consecutively
read, the DQ
2
bit will toggle. However, DQ
2
will not toggle if an address from a non-erasing sector is consecutively
read. This allows users to determine which sectors are in erase and which are not.
The status flag is not output from banks (non-busy banks) which do not execute Embedded Algorithms. For
example, a bank (busy bank) is executing an Embedded Algorithm. When the read sequence is [1]
<
busy bank
>
, [2]
<
non-busy bank
>
, [3]
<
busy bank
>
, the DQ
6
toggles in the case of [1] and [3]. In case of [2], the data
of memory cells are output. In the erase-suspend read mode with the same read sequence, DQ
6
will not be
toggled in [1] and [3].
In the erase suspend read mode, DQ
2
is toggled in [1] and [3]. In case of [2], the data of memory cell is output.
Table 12
Hardware Sequence Flags
*1: Successive reads from the erasing or erase-suspend sector will cause DQ
2
to toggle.
*2: Reading from non-erase suspend sector address will indicate logic “1” at the DQ
2
bit.
Notes: 1. DQ
0
and DQ
1
are reserve pins for future use.
2. DQ
4
is limited to Fujitsu internal use.
Status
DQ
7
DQ
6
DQ
5
DQ
3
DQ
2
In Progress
Embedded Program Algorithm
DQ
7
Toggle
0
0
1
Embedded Erase Algorithm
0
Toggle
0
1
Toggle *
1
Program
Suspended
Mode
Program Suspend Read
(Program Suspended Sector)
Data
Data
Data
Data
Data
Program Suspend Read
(Non-Program Suspended Sec-
tor)
Data
Data
Data
Data
Data
Erase
Suspended
Mode
Erase Suspend Read
(Erase Suspended Sector)
1
1
0
0
Toggle
Erase Suspend Read
(Non-Erase Suspended Sector)
Data
Data
Data
Data
Data
Erase Suspend Program
(Non-Erase Suspended Sector)
DQ
7
Toggle
0
0
1 *
2
Exceeded
Time Limits
Embedded Program Algorithm
DQ
7
Toggle
1
0
1
Embedded Erase Algorithm
0
Toggle
1
1
N/A
Erase
Suspended
Mode
Erase Suspend Program
(Non-Erase Suspended Sector)
DQ
7
Toggle
1
0
N/A
相關(guān)PDF資料
PDF描述
MBM29DL640E80PBT 64 M (8 M X 8/4 M X 16) BIT Dual Operation
MBM29DL640E80TN 64 M (8 M X 8/4 M X 16) BIT Dual Operation
MBM29DL640E80TR 64 M (8 M X 8/4 M X 16) BIT Dual Operation
MBM29DL640E90 64 M (8 M X 8/4 M X 16) BIT Dual Operation
MBM29DL640E90PBT 64 M (8 M X 8/4 M X 16) BIT Dual Operation
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MBM29DL640E80PBT 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:64 M (8 M X 8/4 M X 16) BIT Dual Operation
MBM29DL640E80TN 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:64 M (8 M X 8/4 M X 16) BIT Dual Operation
MBM29DL640E80TR 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:64 M (8 M X 8/4 M X 16) BIT Dual Operation
MBM29DL640E90 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:64 M (8 M X 8/4 M X 16) BIT Dual Operation
MBM29DL640E90PBT 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:64 M (8 M X 8/4 M X 16) BIT Dual Operation
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