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參數(shù)資料
| 型號： | MBM29DL640E90PBT |
| 廠商： | FUJITSU LTD |
| 元件分類： | DRAM |
| 英文描述： | 64 M (8 M X 8/4 M X 16) BIT Dual Operation |
| 中文描述： | 4M X 16 FLASH 3V PROM, 90 ns, PBGA63 |
| 封裝： | PLASTIC, FBGA-63 |
| 文件頁數(shù)： | 25/71頁 |
| 文件大?。?/td> | 913K |
| 代理商： | MBM29DL640E90PBT |
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MBM29DL640E
80/90/12
25
Automatic Sleep Mode
Automatic sleep mode works to restrain power consumption during read-out of device data. It can be useful in
applications such as handy terminal, which requires low power consumption.
To activate this mode, the device automatically switches itself to low power mode when the device addresses
remain stable during access time of 150 ns. It is not necessary to control CE, WE and OE in this mode. In this
mode the current consumed is typically 1
μ
A (CMOS Level) .
During simultaneous operation, V
CC
active current (I
CC2
) is required.
Since the data are latched during this mode, the data are continuously read out. When the addresses are
changed, the mode is automatically canceled and the device reads the data for changed addresses.
Output Disable
With the OE input at a logic high level (V
IH
) , output from the device is disabled. This will cause the output pins
to be in a high impedance state.
Autoselect
The Autoselect mode allows the reading out of a binary code and identifies its manufacturer and type.It is intended
for use by programming equipment for the purpose of automatically matching the device to be programmed with
its corresponding programming algorithm. This mode is functional over the entire temperature range of the device.
To activate this mode, the programming equipment must force V
ID
on address pin A
9
. Three identifier bytes may
then be sequenced from the device outputs by toggling addresses. All addresses are DON’T CARES except A
6
,
A
3
, A
2
, A
1
and A
0
(A
-1
) . (See Tables 2 and 3.)
The manufacturer and device codes may also be read via the command register, for instances when the device
is erased or programmed in a system without access to high voltage on the A
9
pin. The command sequence is
illustrated in Table 4. (Refer to Autoselect Command section.)
In the command Autoselect mode, the bank addresses BA; (A
21
, A
20
, A
19
) must point to a specific bank during
the third write bus cycle of the Autoselect command. Then the Autoselect data will be read from that bank while
array data can be read from the other bank.
In WORD mode, a read cycle from address 00h returns the manufacturer’s code (Fujitsu
=
04h) . A read cycle
at address 01h outputs device code. When 227Eh is output, it indicates that two additional codes, called Extended
Device Codes will be required. Therefore the system may continue reading out these Extended Device Codes
at addresses of 0Eh and 0Fh. Notice that the above applies to WORD mode; the addresses and codes differ
from those of BYTE mode. (Refer to Table 5.1 and 5.2. )
In the case of applying V
ID
on A
9
, since both Bank 1 and Bank 2 enter Autoselect mode, simultanous operation
cannot be executed.
Write
Device erasure and programming are accomplished via the command register. The contents of the register serve
as input to the internal state machine. The state machine output dictates the function of the device.
The command register itself does not occupy any addressable memory location. The register is a latch used to
store the commands, along with the address and data information needed to execute the command. The com-
mand register is written by bringing WE to V
IL
, while CE is at V
IL
and OE is at V
IH
. Addresses are latched on the
falling edge of WE or CE, whichever happens later, while data is latched on the rising edge of WE or CE, whichever
happens first. Standard microprocessor write timings are used.
Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters.
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| MBM29DL640E90TN | 64 M (8 M X 8/4 M X 16) BIT Dual Operation |
| MBM29DL640E90TR | 64 M (8 M X 8/4 M X 16) BIT Dual Operation |
| MBM29DL64DF | FLASH MEMORY CMOS 64 M (8 M X 8/4 M X 16) BIT |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MBM29DL640E90TN | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:64 M (8 M X 8/4 M X 16) BIT Dual Operation |
| MBM29DL640E90TN-LE1 | 制造商:Spansion 功能描述: |
| MBM29DL640E90TR | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:64 M (8 M X 8/4 M X 16) BIT Dual Operation |
| MBM29DL64DF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:FLASH MEMORY CMOS 64 M (8 M X 8/4 M X 16) BIT |
| MBM29DL64DF-70 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:FLASH MEMORY CMOS 64 M (8 M X 8/4 M X 16) BIT |
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