參數(shù)資料
型號: MBM29DL800TA-70
廠商: Fujitsu Limited
英文描述: 8M (1M X 8/512K X 16) BIT
中文描述: 800萬(100萬X 8/512K × 16)位
文件頁數(shù): 36/59頁
文件大小: 600K
代理商: MBM29DL800TA-70
MBM29DL800TA
-70/-90/-12
/MBM29DL800BA
-70/-90/-12
36
t
CH
t
WP
t
WHWH1
t
WC
t
AH
CE
OE
t
RC
Addresses
Data
t
AS
t
OE
t
WPH
t
GHWL
t
DH
DQ
7
PD
A0H
D
OUT
WE
555H
PA
PA
t
OH
Data Polling
3rd Bus Cycle
t
CS
t
CE
t
DS
D
OUT
Figure 6 Alternate WE Controlled Program Operations
Notes:
1. PA is address of the memory location to be programmed.
2. PD is data to be programmed at byte address.
3. DQ
7
is the output of the complement of the data written to the device.
4. D
OUT
is the output of the data written to the device.
5. Figure indicates last two bus cycles out of four bus cycle sequence.
6. These waveforms are for the
×
16 mode. (The addresses differ from
×
8 mode.)
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