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參數(shù)資料
| 型號： | MBM29F002SB |
| 廠商： | Fujitsu Limited |
| 英文描述： | 2M (256K ×8) Bit Flash Memory( 單5V 電源電壓256K ×8位閃速存儲器) |
| 中文描述： | 200萬（256K × 8）位快閃記憶體（單5V的電源電壓256K × 8位閃速存儲器） |
| 文件頁數(shù)： | 11/52頁 |
| 文件大小： | 591K |
| 代理商： | MBM29F002SB |
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11
MBM29F002T/002B/002ST/002SB
-70/-90/-12
Read Mode
The MBM29F002T/002B/002ST/002SB has two control functions which must be satisfied in order to obtain data
at the outputs. CE is the power control and should be used for a device selection. OE is the output control and
should be used to gate data to the output pins if a device is selected.
Address access time (t
ACC
) is equal to the delay from stable addresses to valid output data. The chip enable
access time (t
CE
) is the delay from stable addresses and stable CE to valid data at the output pins. The output
enable access time is the delay from the falling edge of OE to valid data at the output pins (assuming the
addresses have been stable for at least t
ACC
-t
OE
time).
Standby Mode
There are two ways to implement the standby mode on the MBM29F002T/002B/002ST/002SB devices, one
using both the CE and RESET pins; the other via the RESET pin only.
When using both pins, a CMOS standby mode is achieved with CE and RESET inputs both held at V
CC
±
0.3 V.
Under this condition the current is typically reduced to less than 5
μ
A. A TTL standby mode (CE and RESET
pins held at V
IH
), when the current required is reduced to approximately 1 mA. The device can be read with
standard access time (t
CE
) from either of these standby modes.
When using the RESET pin only, a CMOS standby mode is achieved with RESET input held at V
SS
±
0.3 V (CE
= “H” or “L”). Under this condition the current is consumed is less than 100
μ
A. A TTL standby mode (RESET
pin held at V
IL
(CE = “H” or “L”), when the current required is reduced to approximately 1 mA. Once the RESET
pin is taken high, the device requires 500 ns of wake up time before outputs are valid for read access.
In the standby mode the outputs are in the high impedance state, independent of the OE input.
Output Disable
With the OE input at a logic high level (V
IH
), output from the device is disabled. This will cause the output pins
to be in a high impedance state.
Autoselect
The autoselect mode allows the reading out of a binary code from the device and will identify its manufacturer
and type. This mode is intended for use by programming equipment for the purpose of automatically matching
the device to be programmed with its corresponding programming algorithm. This mode is functional over the
entire temperature range of the device.
To activate this mode, the programming equipment must force V
ID
(11.5 V to 12.5 V) on address pin A
9
. Two
identifier bytes may then be sequenced from the device outputs by toggling address A
0
from V
IL
to V
IH
. All
addresses are don’t cares except A
0
, A
1
, A
6
, and A
10
.
The manufacturer and device codes may also be read via the command register, for instances when the
MBM29F002T/002B/002ST/002SB is erased or programmed in a system without access to high voltage on the
A
9
pin. The command sequence is illustrated in Table 6 (refer to Autoselect Command section).
A
0
= V
IL
represents the manufacturer’s code (Fujitsu = 04H) and A
0
= V
IH
the device identifier code (MBM29F002T
= B0H, MBM29F002B = 34H, MBM29F002ST = DCH, and MBM29F002SB = 5DH). All identifires for
manufacturer and device will exhibit odd parity with DQ
7
defined as the parity bit. In order to read the proper
device codes when executing the autoselect, A
1
must be V
IL
(see Tables 3.1 and 3.2).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MBM29F002T-90PD# | 制造商:FUJITSU 功能描述: |
| MBM29F002TC | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:2M (256K X 8) BIT |
| MBM29F002TC-55 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:2M (256K X 8) BIT |
| MBM29F002TC-70 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:2M (256K X 8) BIT |
| MBM29F002TC-90 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:2M (256K X 8) BIT |
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