參數(shù)資料
型號: MBM29F002SB
廠商: Fujitsu Limited
英文描述: 2M (256K ×8) Bit Flash Memory( 單5V 電源電壓256K ×8位閃速存儲器)
中文描述: 200萬(256K × 8)位快閃記憶體(單5V的電源電壓256K × 8位閃速存儲器)
文件頁數(shù): 21/52頁
文件大?。?/td> 591K
代理商: MBM29F002SB
21
MBM29F002T/002B/002ST/002SB
-70/-90/-12
Low V
CC
Write Inhibit
To avoid initiation of a write cycle during V
CC
power-up and power-down, a write cycle is locked out for V
CC
less
than 3.2 V (typically 3.7 V). If V
CC
< V
LKO
, the command register is disabled and all internal program/erase circuits
are disabled. Under this condition the device will reset to the read mode. Subsequent writes will be ignored until
the V
CC
level is greater than V
LKO
. It is the users responsibility to ensure that the control pins are logically correct
to prevent unintentional writes when V
CC
is above 3.2 V.
If Embedded Erase
TM
Algorithm is interrupted, there is possibility that the erasing sector(s) cannot be used.
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE, CE, or WE will not initiate a write cycle.
Logical Inhibit
Writing is inhibited by holding any one of OE = V
IL
, CE = V
IH
, or WE = V
IH
. To initiate a write cycle CE and WE
must be a logical zero while OE is a logical one.
Power-Up Write Inhibit
Power-up of the device with WE = CE = V
IL
and OE = V
IH
will not accept commands on the rising edge of WE.
The internal state machine is automatically reset to the read mode on power-up.
相關(guān)PDF資料
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