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參數資料
| 型號： | MBM29F002TC |
| 廠商： | Fujitsu Limited |
| 英文描述： | 2M (256K X 8) BIT |
| 中文描述： | 200萬（256K × 8）位 |
| 文件頁數： | 11/46頁 |
| 文件大?。?/td> | 461K |
| 代理商： | MBM29F002TC |
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11
MBM29F002TC
-55/-70/-90
/MBM29F002BC
-55/-70/-90
Write
Device erasure and programming are accomplished via the command register. The contents of the register serve
as inputs to the internal state machine. The state machine outputs dictate the function of the device.
The command register itself does not occupy any addressable memory location. The register is a latch used to
store the commands, along with the address and data information needed to execute the command. The
command register is written by bringing WE to V
IL
, while CE is at V
IL
and OE is at V
IH
. Addresses are latched on
the falling edge of WE or CE, whichever happens later; while data is latched on the rising edge of WE or CE,
whichever happens first. Standard microprocessor write timings are used.
Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters.
Sector Protection
The MBM29F002TC/BC features hardware sector protection. This feature will disable both program and erase
operations in any number of sectors (0 through 6). The sector protection feature is enabled using programming
equipment at the user's site. The device is shipped with all sectors unprotected.
To activate this mode, the programming equipment must force V
ID
on address pin A
9
and control pin OE, (suggest
V
ID
= 11.5 V), CE = V
IL
. The sector addresses (A
13
, A
14
, A
15
, A
16
, and A
17
) should be set to the sector to be
protected. Tables 4 and 5 define the sector address for each of the seven (7) individual sectors. Programming
of the protection circuitry begins on the falling edge of the WE pulse and is terminated with the rising edge of
the same. Sector addresses must be held constant during the WE pulse. See figures 14 and 21 for sector
protection waveforms and algorithm.
To verify programming of the protection circuitry, the programming equipment must force V
ID
on address pin A
9
with CE and OE at V
IL
and WE at V
IH
. Scanning the sector addresses (A
13
, A
14
, A
15
, A
16
, and A
17
) while (A
10
, A
6
,
A
1
, A
0
) = (0, 0, 1, 0) will produce a logical “1” code at device output DQ
0
for a protected sector. Otherwise the
device will produce 00H for unprotected sector. In this mode, the lower order addresses, except for A
0
, A
1
, A
6
,
and A
10
are DON’T CARES. Address locations with A
1
= V
IL
are reserved for Autoselect manufacturer and device
codes.
It is also possible to determine if a sector is protected in the system by writing an Autoselect command. Performing
a read operation at the address location XX02H, where the higher order addresses (A
13
, A
14
, A
15
, A
16
, and A
17
)
are the desired sector address will produce a logical “1” at DQ
0
for a protected sector. See Table 3 for Autoselect
codes.
相關PDF資料 |
PDF描述 |
|---|---|
| MBM29F002TC-90 | 2M (256K X 8) BIT |
| MBM29F002B | 2M (256K ×8) Bit Flash Memory( 單5V 電源電壓256K ×8位閃速存儲器) |
| MBM29F002SB | 2M (256K ×8) Bit Flash Memory( 單5V 電源電壓256K ×8位閃速存儲器) |
| MBM29F002ST | 2M (256K ×8) Bit Flash Memory( 單5V 電源電壓256K ×8位閃速存儲器) |
| MBM29F002T | 2M (256K ×8) Bit Flash Memory( 單5V 電源電壓256K ×8位閃速存儲器) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MBM29F002TC-55 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:2M (256K X 8) BIT |
| MBM29F002TC-70 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:2M (256K X 8) BIT |
| MBM29F002TC-90 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:2M (256K X 8) BIT |
| MBM29F004BC-70PD | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:FLASH MEMORY CMOS 4 M (512 K X 8) BIT |
| MBM29F004BC-70PFTN | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:FLASH MEMORY CMOS 4 M (512 K X 8) BIT |
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