參數(shù)資料
型號: MBM29F040C-55PD
廠商: FUJITSU LTD
元件分類: DRAM
英文描述: 4M (512K X 8) BIT
中文描述: 512K X 8 FLASH 5V PROM, 55 ns, PQCC32
封裝: PLASTIC, LCC-32
文件頁數(shù): 11/40頁
文件大小: 424K
代理商: MBM29F040C-55PD
11
MBM29F040C
-55/-70/-90
To verify programming of the protection circuitry, the programming equipment must force V
ID
on address pin A
9
with CE and OE at V
IL
and WE at V
IH
. Scanning the sector addresses (A
16
, A
17
and A
18
) while (A
6
, A
1
, A
0
) = (0,
1, 0) will produce a logical “1” code at device output DQ
0
for a protected sector. Otherwise the device will read
00H for unprotected sector. In this mode, the lower order addresses, except for A
0
, A
1
and A
6
are DON’T CARES.
Address locations with A
1
= V
IL
are reserved for Autoselect manufacturer and device codes.
It is also possible to determine if a sector is protected in the system by writing an Autoselect command. Performing
a read operation at the address location XX02H, where the higher order addresses (A
16
, A
17
and A
18
) are the
sector address will produce a logical “1” at DQ
0
for a protected sector. See Table 3 for Autoselect codes.
Notes:
1.Address bits A
11
to A
18
= X = “H” or “L” for all address commands except for Program Address (PA) and
Sector Address (SA).
2.Bus operations are defined in Table 2.
3.RA = Address of the memory location to be read.
PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of the
WE pulse.
SA = Address of the sector to be erased. The combination of A
18
, A
17
, and A
16
will uniquely select any
sector.
4.RD = Data read from location RA during read operation.
PD = Data to be programmed at location PA. Data is latched on the falling edge of WE.
*: Either of the two reset commands will reset the device.
Command Definitions
Device operations are selected by writing specific address and data sequences into the command register.
Writing incorrect address and data values or writing them in the improper sequence will reset the device to read
mode. Table 5 defines the valid register command sequences. Note that the Erase Suspend (B0H) and Erase
Resume (30H) commands are valid only while the Sector Erase operation is in progress. Moreover, both Read/
Reset Commands are functionally equivalent, resetting the device to the read mode.
Table 5 MBM29F040C Command Definitions
Command
Sequence
Read/Reset
Bus
Write
Cycles
Req'd
First Bus
Write Cycle
Second Bus
Write Cycle
Third Bus
Write Cycle
Fourth Bus
Read/Write
Cycle
Fifth Bus
Write Cycle
Sixth Bus
Write Cycle
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Read/Reset*
1
XXXH F0H
Read/Reset*
4
555H
AAH
2AAH
55H
555H
F0H
RA
RD
Autoselect
3
555H
AAH
2AAH
55H
555H
90H
Byte Program
4
555H
AAH
2AAH
55H
555H
A0H
PA
PD
Chip Erase
6
555H
AAH
2AAH
55H
555H
80H
555H
AAH
2AAH
55H
555H
10H
Sector Erase
6
555H
AAH
2AAH
55H
555H
80H
555H
AAH
2AAH
55H
SA
30H
Sector Erase Suspend
Erase can be suspended during sector erase with Addr (“H” or “L”). Data (B0H)
Sector Erase Resume
Erase can be resumed after suspend with Addr (“H” or “L”). Data (30H)
相關PDF資料
PDF描述
MBM29F040C-55PFTN Replaced by TPS2041B : 0.7A, 2.7-5.5V Single Hi-Side MOSFET, Fault Report, Act-Low Enable 8-SOIC 0 to 85
MBM29F040C-55PFTR Replaced by TPS2041B : 0.7A, 2.7-5.5V Single Hi-Side MOSFET, Fault Report, Act-Low Enable 8-SOIC 0 to 85
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MBM29F040C-55PFTN 制造商:SPANSION 制造商全稱:SPANSION 功能描述:FLASH MEMORY 4M (512K x 8) BIT
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MBM29F040C70PDER 制造商:FUJITSU 功能描述: