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參數(shù)資料
| 型號： | MBM29LV002B-12 |
| 廠商： | Fujitsu Limited |
| 英文描述： | 2M (256K ×8) Bit Flash Memory(2M (256K ×8)位 單5V 電源電壓閃速存儲器) |
| 中文描述： | 200萬（256K × 8）位閃存（200萬（256K × 8）位單5V的電源電壓閃速存儲器） |
| 文件頁數(shù)： | 18/45頁 |
| 文件大?。?/td> | 406K |
| 代理商： | MBM29LV002B-12 |
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18
MBM29LV002T
-10/-12
/MBM29LV002B
-10/-12
operation is completed as indicated by Data Polling or Toggle Bit I. If DQ
3
is low (“0”), the device will accept
additional Sector Erase commands. To insure the command has been accepted, the system software should
check the status of DQ
3
prior to and following each subsequent sector erase command. If DQ
3
were high on the
second status check, the command may not have been accepted.
See Table 7: Hardware Sequence Flags.
DQ
2
Toggle Bit II
This Toggle Bit II, along with DQ
6
, can be used to determine whether the devices are in the Embedded Erase
Algorithm or in Erase Suspend.
Successive reads from the erasing sector will cause DQ
2
to toggle during the Embedded Erase Algorithm. If the
devices are in the erase-suspended-read mode, successive reads from the erase-suspended sector will cause
DQ
2
to toggle. When the devices are in the erase-suspended-program mode, successive reads from the byte
address of the non-erase suspended sector will indicate a logic “1” at the DQ
2
bit.
DQ
6
is different from DQ
2
in that DQ
6
toggles only when the standard program or Erase, or Erase Suspend
Program operation is in progress. The behavior of these two status bits, along with that of DQ
7
, is summarized
as follows:
Notes:
1. These status flags apply when outputs are read from a sector that has been erase-suspended.
2. These status flags apply when outputs are read from the byte address of the non-erase suspended sector.
For example, DQ
2
and DQ
6
can be used together to determine the erase-suspend-read mode. (DQ
2
toggles
while DQ
6
does not.) See also above Table and Figure 20.
Furthermore, DQ
2
can also be used to determine which sector is being erased. When the devices are in the
erase mode, DQ
2
toggles if this bit is read from the erasing sector.
RY/BY
Ready/Busy
The MBM29LV002T/002B provide a RY/BY open-drain output pin as a way to indicate to the host system that
the Embedded
Algorithms are either in progress or completed. If the output is low, the device is busy with either
a program or erase operation. If the output is high, the device is ready to accept any read/write or erase operation.
When the RY/BY pin is low, the device will not accept any additional program or erase commands. If the
MBM29LV002T/002B are placed in an Erase Suspend mode, the RY/BY output will be high. Also, since this is
an open drain output, many RY/BY pins can be tied together in parallel with a pull up resistor to V
CC
.
During programming, the RY/BY pin is driven low after the rising edge of the fourth WE pulse. During an erase
operation, the RY/BY pin is driven low after the rising edge of the sixth WE pulse. The RY/BY pin will indicate a
busy condition during the RESET pulse. See Figure 11 and 12 for a detailed timing diagram.
Since this is an open-drain output, several RY/BY pins can be tied together in parallel with a pull-up resistor to V
CC
.
Mode
DQ
7
DQ
6
DQ
2
Program
Toggles
1
Erase
0
Toggles
Toggles
Erase Suspend Read
(Erase-Suspended Sector)
(Note 1)
1
1
Toggles
Erase Suspend Program
Toggles
1 (Note 2)
DQ
7
DQ
7
(Note 2)
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MBM29LV002BC | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:2M (256K x 8) BIT |
| MBM29LV002BC-12 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:2M (256K x 8) BIT |
| MBM29LV002BC-12PNS | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:2M (256K x 8) BIT |
| MBM29LV002BC-12PTN | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:2M (256K x 8) BIT |
| MBM29LV002BC-12PTR | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:2M (256K x 8) BIT |
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