參數(shù)資料
型號(hào): MBM29LV008T-X
廠商: Fujitsu Limited
英文描述: CMOS 8M (1M ×8) Flash Memory(CMOS 8M (1M ×8)位3V單電源 閃速存儲(chǔ)器)
中文描述: 800萬(wàn)的CMOS(100萬(wàn)× 8)快閃記憶體(800萬(wàn)的CMOS(100萬(wàn)× 8)位3V的單電源閃速存儲(chǔ)器)
文件頁(yè)數(shù): 11/47頁(yè)
文件大?。?/td> 434K
代理商: MBM29LV008T-X
11
MBM29LV008T-X/MBM29LV008B-X
It is also possible to determine if a sector is protected in the system by writing an Autoselect command. Performing
a read operation at the address location XX02H, where the higher order addresses (A
19
, A
18
, A
17
, A
16
, A
15
, A
14
,
and A
13
) are the sector address will produce a logical “1” at DQ
0
for a protected sector. See Table 3.1 and 3.2
for Autoselect codes.
Temporary Sector Unprotection
This feature allows temporary unprotection of previously protected sectors of the MBM29LV008T-X/008B-X
devices in order to change data. The Sector Unprotection mode is activated by setting the RESET pin to high
voltage (12 V). During this mode, formerly protected sectors can be programmed or erased by selecting the
sector addresses. Once the 12 V is taken away from the RESET pin, all the previously protected sectors will be
protected again. Refer to Figures 15 and 22.
RESET
Hardware Reset
The MBM29LV008T-X/008B-X devices may be reset by driving the RESET pin to V
IL
. The RESET pin has a pulse
requirement and has to be kept low (V
IL
) for at least 500 ns in order to properly reset the internal state machine.
Any operation in the process of being executed will be terminated and the internal state machine will be reset
to the read mode 20
μ
s after the RESET pin is driven low. Furthermore, once the RESET pin goes high, the
device requires an additional 50 ns before it will allow read access. When the RESET pin is low, the device will
be in the standby mode for the duration of the pulse and all the data output pins will be tri-stated. If a hardware
reset occurs during a program or erase operation, the data at that particular location will be corrupted. Please
note that the RY/BY output signal should be ignored during the RESET pulse. Refer to Figure 10 for the timing
diagram. Refer to Temporary Sector Unprotection for additional functionality.
If hardware reset occurs during Embedded Erase Algorithm, there is a possibility that the eraseing sector(s)
cannot be used.
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