參數(shù)資料
型號(hào): MBM29LV400B
廠商: Fujitsu Limited
英文描述: CMOS 4M (512K ×8/256K×16) Falsh Memory(512K ×8/256K×16位 單5V 電源電壓閃速存儲(chǔ)器)
中文描述: 的CMOS 4分(為512k × 8/256K × 16)Falsh存儲(chǔ)器(為512k × 8/256K × 16位單5V的電源電壓閃速存儲(chǔ)器)
文件頁數(shù): 10/51頁
文件大小: 334K
代理商: MBM29LV400B
10
MBM29LV400T/MBM29LV400B
I
FUNCTIONAL DESCRIPTION
Read Mode
The MBM29LV400T/400B have two control functions which must be satisfied in order to obtain data at the
outputs. CE is the power control and should be used for a device selection. OE is the output control and should
be used to gate data to the output pins if a device is selected.
Address access time (t
ACC
) is equal to the delay from stable addresses to valid output data. The chip enable
access time (t
CE
) is the delay from stable addresses and stable CE to valid data at the output pins. The output
enable access time is the delay from the falling edge of OE to valid data at the output pins. (Assuming the
addresses have been stable for at least t
ACC
- t
CE
time.)
Standby Mode
There are two ways to implement the standby mode on the MBM29LV400T/400B devices, one using both the
CE and RESET pins; the other via the RESET pin only.
When using both pins, a CMOS standby mode is achieved with CE and RESET inputs both held at V
CC
±
0.3 V.
Under this condition the current consumed is less than 5
μ
A. A TTL standby mode is achieved with CE and
RESET pins held at V
IH
. Under this condition the current is reduced to less than 250
μ
A. The devices can be
read with standard access time (t
CE
) from either of these standby modes.
When using the RESET pin only, a CMOS standby mode is achieved with RESET input held at V
SS
±
0.3 V
(CE = “H” or “L”). Under this condition the current is consumed is less than 5
μ
A. A TTL standby mode is achieved
with RESET pin held at V
IL
, (CE= “H” or “L”). Under this condition the current required is reduced to less than
250
μ
A. Once the RESET pin is taken high, the device requires 500 ns of wake up time before outputs are valid
for read access.
In the standby mode the outputs are in the high impedance state, independent of the OE input.
Automatic Sleep Mode
There is a function called automatic sleep mode to restrain power consumption during read-out of
MBM29LV400T/400B data. This mode can be used effectively with an application requested low power
consumption such as handy terminals.
To activate this mode, MBM29LV400T/400B automatically switch themselves to low power mode when
MBM29LV400T/400B addresses remain stably during access time of 300 ns. It is not necessary to control CE,
WE, and OE on the mode. Under the mode, the current consumed is typically 1
μ
A (CMOS Level).
Since the data are latched during this mode, the data are read out continuously. If the addresses are changed,
the mode is canceled automatically and MBM29LV400T/400B read out the data for changed addresses.
Output Disable
With the OE input at a logic high level (V
IH
), output from the devices are disabled. This will cause the output pins
to be in a high impedance state.
Autoselect
The autoselect mode allows the reading out of a binary code from the devices and will identify its manufacturer
and type. This mode is intended for use by programming equipment for the purpose of automatically matching
the devices to be programmed with its corresponding Programming Algorithm. This mode is functional over the
entire temperature range of the devices.
To activate this mode, the programming equipment must force V
ID
(11.5 V to 12.5 V) on address pin A
9
. Two
identifier bytes may then be sequenced from the devices outputs by toggling address A
0
from V
IL
to V
IH
. All
addresses are DON'T CARES except A
0
, A
1
, A
6
, and A
-1
.
(See Table 4.1.)
相關(guān)PDF資料
PDF描述
MBM29LV400T CMOS 4M (512K ×8/256K×16) Falsh Memory(512K ×8/256K×16位 單5V 電源電壓閃速存儲(chǔ)器)
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