參數(shù)資料
型號(hào)： MBM29LV400TC-90PF
廠商： FUJITSU LTD
元件分類： DRAM
英文描述： 4M (512K X 8/256K X 16) BIT
中文描述： 256K X 16 FLASH 3V PROM, 90 ns, PDSO44
封裝： PLASTIC, SOP-44
文件頁數(shù)： 3/58頁
文件大?。?/td> 584K
代理商： MBM29LV400TC-90PF
3
MBM29LV400TC
-70/-90/-12
/MBM29LV400BC
-70/-90/-12
I
GENERAL DESCRIPTION
The MBM29LV400TC/BC are a 8M-bit, 3.0 V-only Flash memory organized as 512K bytes of 8 bits each or 256K
words of 16 bits each. The MBM29LV400TC/BC are offered in a 48-pin TSOP(I), 44-pin SOP 48-pin CSOP and
48-ball FBGA packages. These devices are designed to be programmed in-system with the standard system
3.0 V V
CC
supply. 12.0 V V
PP
and 5.0 V V
CC
are not required for write or erase operations. The devices can also
be reprogrammed in standard EPROM programmers.
The standard MBM29LV400TC/BC offer access times 70 ns and 120 ns, allowing operation of high-speed
microprocessors without wait states. To eliminate bus contention the devices have separate chip enable (CE),
write enable (WE), and output enable (OE) controls.
The MBM29LV400TC/BC are pin and command set compatible with JEDEC standard E
2
PROMs. Commands
are written to the command register using standard microprocessor write timings. Register contents serve as
input to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally
latch addresses and data needed for the programming and erase operations. Reading data out of the devices
is similar to reading from 5.0 V and 12.0 V Flash or EPROM devices.
The MBM29LV400TC/BC are programmed by executing the program command sequence. This will invoke the
Embedded Program Algorithm which is an internal algorithm that automatically times the program pulse widths
and verifies proper cell margin. Typically, each sector can be programmed and verified in about 0.5 seconds.
Erase is accomplished by executing the erase command sequence. This will invoke the Embedded Erase
Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed
before executing the erase operation. During erase, the devices automatically time the erase pulse widths and
verify proper cell margin.
A sector is typically erased and verified in 1.0 second. (If already completely preprogrammed.)
The devices also feature a sector erase architecture. The sector mode allows each sector to be erased and
reprogrammed without affecting other sectors. The MBM29LV400TC/BC are erased when shipped from the
factory.
The devices feature single 3.0 V power supply operation for both read and write functions. Internally generated
and regulated voltages are provided for the program and erase operations. A low V
CC
detector automatically
inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling of DQ
7
,
by the Toggle Bit feature on DQ
6
, or the RY/BY output pin. Once the end of a program or erase cycle has been
completed, the devices internally reset to the read mode.
Fujitsu’s Flash technology combines years of EPROM and E
2
PROM experience to produce the highest levels
of quality, reliability, and cost effectiveness. The MBM29LV400TC/BC memories electrically erase the entire chip
or all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one
byte/word at a time using the EPROM programming mechanism of hot electron injection.
相關(guān)PDF資料
PDF描述
MBM29LV400TC-90PFTN 4M (512K X 8/256K X 16) BIT
MBM29LV400TC-90PFTR 4M (512K X 8/256K X 16) BIT
MBM29LV400TC-70PFTR 4M (512K X 8/256K X 16) BIT
MBM29LV400BC 4M (512K X 8/256K X 16) BIT
MBM29LV400BC-70 4M (512K X 8/256K X 16) BIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MBM29LV400TC-90PFTN 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:4M (512K X 8/256K X 16) BIT
MBM29LV400TC-90PFTN-S# 制造商:FUJITSU 功能描述:
MBM29LV400TC-90PFTR 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:4M (512K X 8/256K X 16) BIT
MBM29LV400TC-90PW 制造商:SPANSION 制造商全稱:SPANSION 功能描述:FLASH MEMORY CMOS 4M (512K X 8/256K X 16) BIT
MBM29LV650UE 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:64M (4M x 16) BIT
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