參數(shù)資料
型號(hào): MC100EP195BMNR4G
廠商: ON Semiconductor
文件頁(yè)數(shù): 7/17頁(yè)
文件大小: 0K
描述: IC DELAY LINE 1024TAP 32-QFN
標(biāo)準(zhǔn)包裝: 1
系列: 100EP
標(biāo)片/步級(jí)數(shù): 1024
功能: 可編程
延遲到第一抽頭: 2.5ns
接頭增量: 10ps
可用的總延遲: 2.2ns ~ 12.2ns
獨(dú)立延遲數(shù): 1
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN(5x5)
包裝: 剪切帶 (CT)
其它名稱: MC100EP195BMNR4GOSCT
MC100EP195B
http://onsemi.com
15
Figure 9. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q
D
Zo = 50 W
50 W
VTT
VTT = VCC 2.0 V
ORDERING INFORMATION
Device
Package
Shipping
MC100EP195BFAG
LQFP32
(PbFree)
250 Units / tray
MC100EP195BFAR2G
LQFP32
(PbFree)
2000 / Tape & Reel
MC100EP195BMNG
QFN32
(PbFree)
74 Units / Rail
MC100EP195BMNR4G
QFN32
(PbFree)
1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
ECL Clock Distribution Techniques
AN1406/D
Designing with PECL (ECL at +5.0 V)
AN1503/D
ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
Metastability and the ECLinPS Family
AN1568/D
Interfacing Between LVDS and ECL
AN1642/D
The ECL Translator Guide
AND8001/D Odd Number Counters Design
AND8002/D Marking and Date Codes
AND8020/D Termination of ECL Logic Devices
AND8066/D Interfacing with ECLinPS
AND8090/D AC Characteristics of ECL Devices
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MC100EP195FAR2G 功能描述:延遲線/計(jì)時(shí)元素 3.3V/5V ECL Programmable Delay RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube