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參數(shù)資料
| 型號： | MC10H641FNR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 6/10頁 |
| 文件大小： | 0K |
| 描述： | IC CLOCK BUFFER 1:9 65MHZ 28PLCC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 扇出緩沖器（分配） |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:9 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | PECL |
| 輸出： | TTL |
| 頻率 - 最大： | 65MHz |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 28-PLCC（11.51x11.51） |
| 包裝： | 剪切帶 (CT) |
| 其它名稱： | MC10H641FNR2GOSCT |
MC10H641, MC100H641
http://onsemi.com
5
Determining Skew for a Specific Application
The H641 has been designed to meet the needs of very low
skew clock distribution applications. In order to optimize
the device for this application special considerations are
necessary in the determining of the parttopart skew
specification limits. Older standard logic devices are
specified with relatively slack limits so that the device can
be guaranteed over a wide range of potential environmental
conditions. This range of conditions represented all of the
potential applications in which the device could be used. The
result was a specification limit that in the vast majority of
cases was extremely conservative and thus did not allow for
an optimum system design. For noncritical skew designs
this practice is acceptable, however as the clock speeds of
systems increase overly conservative specification limits
can kill a design.
The following will discuss how users can use the
information provided in this data sheet to tailor a
parttopart skew specification limit to their application.
The skew determination process may appear somewhat
tedious and time consuming, however if the utmost in
performance is required this procedure is necessary. For
applications which do not require this level of skew
performance a generic parttopart skew limit of 2.5 ns can
be used. This limit is good for the entire ambient temperature
range, the guaranteed VCC (VT, VE) range and the
guaranteed operating frequency range.
Temperature Dependence
A unique characteristic of the H641 data sheet is that the
AC parameters are specified for a junction temperature
rather than the usual ambient temperature. Because very few
designs will actually utilize the entire commercial
temperature range of a device a tighter propagation delay
window can be established given the smaller temperature
range. Because the junction temperature and not the ambient
temperature is what affects the performance of the device the
parameter limits are specified for junction temperature. In
addition the relationship between the ambient and junction
temperature will vary depending on the frequency, load and
board environment of the application. Since these factors are
all under the control of the user it is impossible to provide
specification limits for every possible application.
Therefore a baseline specification was established for
specific junction temperatures and the information that
follows will allow these to be tailored to specific
applications.
Since the junction temperature of a device is difficult to
measure directly, the first requirement is to be able to
“translate” from ambient to junction temperatures. The
standard method of doing this is to use the power dissipation
of the device and the thermal resistance of the package. For
a TTL output device the power dissipation will be a function
of the load capacitance and the frequency of the output. The
total power dissipation of a device can be described by the
following equation:
PD (watts) = ICC (no load) * VCC +
VS * VCC * f * CL * # Outputs
where:
VS= Output Voltage Swing = 3.0 V
f = Output Frequency
CL = Load Capacitance
ICC = IEE + ICCH
Figure 1 plots the ICC versus Frequency of the H641 with
no load capacitance on the output. Using this graph and the
information specific to the application a user can determine
the power dissipation of the H641.
Figure 1. ICC versus f (No Load)
0
1020304050607080
FREQUENCY (MHz)
NORMALIZED
ICC
0
1
2
3
4
5
Figure 2 illustrates the thermal resistance (in °C/W) for
the PLCC28 under various air flow conditions. By reading
the thermal resistance from the graph and multiplying by the
power dissipation calculated above the junction temperature
increase above ambient of the device can be calculated.
0
200
400
600
800
1000
AIRFLOW (LFPM)
THERMAL
RESIST
ANCE
(
30
40
50
60
70
C/W)°
Figure 2. jJA versus Air Flow
Finally taking this value for junction temperature and
applying it to Figure 3 allows the user to determine the
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC10H642 C57M WAF | 制造商:ON Semiconductor 功能描述: |
| MC10H642FN | 功能描述:時鐘驅(qū)動器及分配 ECL/TTL Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MC10H642FNG | 功能描述:時鐘驅(qū)動器及分配 BBG ECL/TTL Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MC10H642FNR2 | 功能描述:時鐘驅(qū)動器及分配 ECL/TTL Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MC10H642FNR2G | 功能描述:時鐘驅(qū)動器及分配 BBG ECL/TTL Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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