參數(shù)資料
型號: MC10H641FNR2G
廠商: ON Semiconductor
文件頁數(shù): 7/10頁
文件大小: 0K
描述: IC CLOCK BUFFER 1:9 65MHZ 28PLCC
標(biāo)準(zhǔn)包裝: 1
類型: 扇出緩沖器(分配)
電路數(shù): 1
比率 - 輸入:輸出: 1:9
差分 - 輸入:輸出: 是/是
輸入: PECL
輸出: TTL
頻率 - 最大: 65MHz
電源電壓: 4.75 V ~ 5.25 V
工作溫度: 0°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 28-PLCC(11.51x11.51)
包裝: 剪切帶 (CT)
其它名稱: MC10H641FNR2GOSCT
MC10H641, MC100H641
http://onsemi.com
6
propagation delay for the device in question. A more
common use would be to establish an ambient temperature
range for the H641’s in the system and utilize the above
methodology to determine the potential increased skew of
the distribution network. Note that for this information if the
TPD versus Temperature curve were linear the calculations
would not be required. If the curve were linear over all
temperatures a simple temperature coefficient could be
provided.
Figure 3. TPD versus Junction Temperature
30
JUNCTION TEMPERATURE (
PROP
AGA
TION
DELA
Y
(ns)
5.2
10
30
50
70
90
110
130
°C)
5.4
5.6
5.8
6.0
6.2
6.4
TPHL
TPLH
VCC Dependence
TTL and CMOS devices show a significant propagation
delay dependence with VCC. Therefore the VCC variation in
a system will have a direct impact on the total skew of the
clock distribution network. When calculating the skew
between two devices on a single board it is very likely an
assumption of identical VCC’s can be made. In this case the
number provided in the data sheet for parttopart skew
would be overly conservative. By using Figure 4 the skew
given in the data sheet can be reduced to represent a smaller
or zero variation in VCC. The delay variation due to the
specified VCC variation is ≈ 270 ps. Therefore, the 1 ns
window on the data sheet can be reduced by 270 ps if the
devices in question will always experience the same VCC.
The distribution of the propagation delay ranges given in the
data sheet is actually a composite of three distributions
whose means are separated by the fixed difference in
propagation delay at the typical, minimum and maximum
VCC.
Figure 4. DTPD versus VCC
4.75
VCC (V)
T
140
4.85
4.95
5.05
5.15
5.25
100
60
20
60
100
140
TPLH
TPHL
Δ
PD
(ps)
Capacitive Load Dependence
As with VCC the propagation delay of a TTL output is
intimately tied to variation in the load capacitance. The skew
specifications given in the data sheet, of course, assume
equal loading on all of the outputs. However situations could
arise where this is an impossibility and it may be necessary
to estimate the skew added by asymmetric loading. In
addition the propagation delay numbers are provided only
for 50 pF loads, thus necessitating a method of determining
the propagation delay for alternative loads.
Figure 5 shows the relationship between the two
propagation delays with respect to the capacitive load on the
output. Utilizing this graph and the 50 pF limits the
specification of the H641 can be mapped into a spec for
either a different value load or asymmetric loads.
Figure 5. TPD versus Load
0
CAPACITIVE LOAD (pF)
MORMALIZED
PROP
AGA
TION
DELA
Y
(ns)
0.75
10
20
30
40
50
60
70
80
90 100
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
TPHL
TPLH
MEASURED
THEORETICAL
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MC10H642FNR2G 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 BBG ECL/TTL Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel