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參數(shù)資料
| 型號： | MC13081X |
| 廠商： | Motorola, Inc. |
| 英文描述： | Multimode Color Monitor Horizontal, Vertical, and Video Combination Processor |
| 中文描述： | 多模彩色顯示器水平，垂直和視頻處理器組合 |
| 文件頁數(shù)： | 11/20頁 |
| 文件大?。?/td> | 235K |
| 代理商： | MC13081X |
MC13081X
11
MOTOROLA ANALOG IC DEVICE DATA
APPLICATION INFORMATION
The MC13081X is an integrated multisync color monitor
processor. It combines horizontal/vertical deflection processing
circuitry and video pre–amplifiers into a single device.
The overall timebase section consists of two parts:
horizontal and vertical. The horizontal timebase can be
operated from 30 kHz to 64 kHz, and can be driven from TTL
separate sync, composite sync, or a composite video signal.
There are two PLLs which ensure proper timing throughout
the whole system. The first PLL provides line locking of the
horizontal sync signal with the built–in oscillator, while the
second one maintains fixed timing with the horizontal flyback
signal such that a stable display can be achieved.
The vertical timebase section operates from 45 Hz to
100 Hz, and can receive various sync signals as the
horizontal one does. This section consists of an oscillator and
a ramp generator. Adjustments include linearity, ramp
amplitude, and minimum free running frequency in the
absence of sync signal.
The video section has three 70 MHz bandwidth
pre–amplifiers. The outputs of these amplifiers are
uncommitted collector/emitter facilitating cascode
configuration with subsequent stages. Controls include
brightness and contrast. In addition, the voltage gain of each
amplifier can be adjusted individually which provides
flexibility in adjusting color correctness. Blanking and
clamping signals are provided to the amplifiers internally from
the timebase section. Additionally, a blanking signal can also
be supplied externally.
Separate power supply and ground pins are provided to
the timebase and video section in order to minimize the cross
interference between these two sections.
C16
Figure 2. Application Circuit
R9
R12
C1
C5
1
3
2
VR2
R10
52
VR3
C6
C7
51
VR4
48
47
55
5.0 Vref
VR5
C8
R13
VR6
Vd
C9
44
46
43
Vd
R14
Va
29
Vd
56
39
38
34
33
31
30
40
37
32
C22
C23
C24
R19
R20
R21
Va
41
45
42
13
6
19
18
26
24
20
9
10
C10
C11
R15
R16
C12
C13
VR7
VR8
C14
VR9
C15
C18
C17
VR11
VR10
C19
R17
C20
C21
R18
4
5
23
25
27
28
11
12
C2
C3
R1
R2
R3
Vd
R4
R5
R6
VR1
Vd
R7
R8
Va
Vd
L1
L2
C25
C26
C27
C28
C29
AFC
Video Gnd
V–Sync
H–Sync
R
G
B
MC13081X
C4
C1–C3
C4,C6–C9,C13–C19,C22–C24,C29
C5,C20
C10
C11
C12
C21
C27
C26,C28
C30,C31
2.2
μ
F
100 nF
10 nF
1.0 nF
100 nF
22
μ
F
10 nF
100
μ
F
47
μ
F
1.0
μ
F
R1–R3,R17
R4–R6
R7
R8
R9
R10
R12
R13
R14
R15
R16
R18
R19–R21
75
15 k
3.9 M
6.8 M
8.2 k
220 k
220 k
2.2 k
470
5.6 k
5.1 k
10 k
330
VR1,VR5–VR11
VR2
VR3
VR4
10 k
5.0 k
200 k
1.0 M
8.0 Vdc
Vertical
TTL Sync
Horizontal TTL Sync
Channel 1 Video In
Channel 2 Video In
Channel 3 Video In
Horizontal Freq Control
Channel 3 Collector Out
Channel 2 Collector Out
Channel 1 Collector Out
Channel 3 Clamp
Channel 3 Emitter Out
Channel 2 Clamp
Channel 2 Emitter Out
Channel 1 Clamp
Channel 1 Emitter Out
Timebase
VCC2
Video
VCC1
5.0 Vref
V
I
V
V
V
V
V
H
H
H
F
P
5
C
C
C
C
B
C
H
P
T
X
D
S
L1
L2
50
μ
H
50
μ
H
5.0 Vref
V
O
H
D
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