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參數(shù)資料
| 型號： | MC13110AFTA |
| 廠商： | MOTOROLA INC |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | UNIVERSAL NARROWBAND FM RECEIVER INTEGRATED CIRCUIT |
| 中文描述： | TELECOM, CORDLESS, RF AND BASEBAND CIRCUIT, PQFP48 |
| 封裝： | PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 51/68頁 |
| 文件大?。?/td> | 1316K |
| 代理商： | MC13110AFTA |
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MC13110A/B MC13111A/B
51
MOTOROLA ANALOG IC DEVICE DATA
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MPU “Clk Out” Power–Up Default Divider Value
The power–up default divider value is “divide by 5”. This
provides a MPU clock of about 2.0 MHz after initial
power–up. The reason for choosing a relatively low clock
frequency at initial power–up is because some
microprocessors operate using a 3.0 V power supply and
have a maximum clock frequency of 2.0 MHz. After initial
power–up, the MPU can change the clock divider value and
set the clock to the desired operating frequency. Special care
was taken in the design of the clock divider to insure that the
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Bit #2
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Bit #1
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Bit #0
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Divider Value
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Clk Out
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0
1
0
4
1
0
0
2.5
1
1
1
312.5
transition between one clock divider value and another is
“smooth” (i.e. there will be no narrow clock pulses to disturb
the MPU).
MPU “Clk Out” Radiated Noise on Circuit Board
The clock line running between the MC13110A/B or
MC13111A/B and the microprocessor has the potential to
radiate noise. Problems in the system can occur, especially if
the clock is a square wave digital signal with large high
frequency harmonics. In order to minimize the radiated noise,
a 1000
resistor is included on–chip in series with the “Clk
Out” output driver. A small capacitor or inductor with a
capacitor can be connected to the “Clk Out” line on the PCB
to form a one or two pole low pass filter. This filter should
significantly reduce noise radiated by attenuating the high
frequency harmonics on the signal line. The filter can also be
used to attenuate the signal level so that it is only as large as
required by the MPU clock input. To further reduce radiated
noise, the PCB signal trace length should be kept to a
minimum.
Volume Control Programming
The volume control adjustable gain block can be
programmed in 2 dB gain steps from –14 dB to +16 dB. The
power–up default value for the MC13110A/B and
MC13111A/B is 0 dB. (see Figure 123)
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Figure 123. Volume Control
Volume Control
Bit #3
Volume Control
Bit #2
Volume Control
Bit #1
Volume Control
Bit #0
Volume
Control #
Gain/Attenuation
Amount
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0
0
0
0
0
–14 dB
0
0
0
1
1
–12 dB
0
0
1
0
2
–10 dB
0
0
1
1
3
–8 dB
0
1
0
0
4
–6 dB
0
1
0
1
5
–4 dB
相關PDF資料 |
PDF描述 |
|---|---|
| MC13110BFB | UNIVERSAL NARROWBAND FM RECEIVER INTEGRATED CIRCUIT |
| MC13111AFB | UNIVERSAL NARROWBAND FM RECEIVER INTEGRATED CIRCUIT |
| MC13110BFTA | UNIVERSAL NARROWBAND FM RECEIVER INTEGRATED CIRCUIT |
| MC13111AFTA | UNIVERSAL NARROWBAND FM RECEIVER INTEGRATED CIRCUIT |
| MC13111BFB | UNIVERSAL NARROWBAND FM RECEIVER INTEGRATED CIRCUIT |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC13110BFB | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:UNIVERSAL NARROWBAND FM RECEIVER INTEGRATED CIRCUIT |
| MC13110BFTA | 制造商:Motorola 功能描述:MOTOROLA 9942 |
| MC13111AFB | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:UNIVERSAL NARROWBAND FM RECEIVER INTEGRATED CIRCUIT |
| MC13111AFTA | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:UNIVERSAL CORDLESS TELEPHONE SUBSYSTEM IC |
| MC13111BFB | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:UNIVERSAL NARROWBAND FM RECEIVER INTEGRATED CIRCUIT |
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