參數(shù)資料
型號(hào): MC13224V
廠商: FREESCALE SEMICONDUCTOR INC
元件分類(lèi): 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA99
封裝: 9.50 X 9.50 MM, 1.20 MM HEIGHT, ROHS COMPLIANT, LGA-99
文件頁(yè)數(shù): 45/54頁(yè)
文件大小: 490K
代理商: MC13224V
MC1322x Technical Data, Rev. 1.3
Freescale Semiconductor
5
2.2
Features Summary
IEEE 802.15.4 standard compliant on-chip transceiver/modem
— 2.4 GHz ISM Band operation
— 16 selectable channels
— Programmable transmitter output power (-30 dBm to +4 dBm typical)
— World-class receiver sensitivity
– < -96 dBm typical receiver sensitivity using DCD mode (<1% PER, 20-byte packets)
– < -100 dBm typical receiver sensitivity using NCD mode (<1% PER, 20-byte packets)
Hardware acceleration for IEEE 802.15.4 applications
— MAC accelerator (sequencer and DMA interface)
— Advanced encryption/decryption hardware engine (AES 128-bit)
Supports standard IEEE 802.15.4 signaling with 250 kbps data rate
32-bit ARM7TDMI-S CPU core with programmable performance up to 26 MHz (24 MHz typical)
Extensive on-board memory resources
— 128 Kbyte serial FLASH memory (will be mirrored into RAM)
— 96 Kbyte SRAM
— 80 Kbyte ROM
Best-in-class power dissipation
— 22 mA typical RX current draw (DCD mode) with radio and MCU active
— 29 mA typical TX current draw with radio and MCU active (coin cell capable)
— 3.3 mA typical current draw with MCU active (radio off)
— 0.8 mA typical current with MCU idle (radio off)
— 0.85
μA typical Hibernate current (retain 8 Kbyte SRAM contents)
— 0.4
μA maximum Off current (device in reset)
Extensive sleep mode control and variation
— Hibernate and Doze low power modes
— Programmable degree of power down
— Clock management
— Onboard 2 kHz oscillator for wake-up timer.
— Optional 32.768 kHz crystal oscillator for accurate real-time sleep mode timing and wake-up
with a possible sleep period greater than 36.4 hours
— Wake-up through programmable timer, external real-time interrupts, or ADC timer
Extensive MCU peripherals set
— Dedicated 802.15.4 modem/radio interface module (RIF)
— Dedicated NVM SPI interface for managing FLASH memory
— Two dedicated UART modules capable of 2 Mbps with CTS/RTS support
— SPI port with programmable master and slave operation
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