MOTOROLA CMOS LOGIC DATA
Motorola, Inc. 1995
25
MC14006B
The MC14006B shift register is comprised of four separate shift register
sections sharing a common clock: two sections have four stages, and two
sections have five stages with an output tap on both the fourth and fifth
stages. This makes it possible to obtain a shift register of 4, 5, 8, 9, 10, 12,
13, 14, 16, 17, or 18 bits by appropriate selection of inputs and outputs. This
part is particularly useful in serial shift registers and time delay circuits.
Output Transitions Occur on the Falling Edge of the Clock Pulse
Fully Static Operation
Can be Cascaded to Provide Longer Shift Register Lengths
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–power TTL Loads or One Low–power
Input or Output Voltage (DC or Transient)
lin, lout
Input or Output Current (DC or Transient),
±
10
V
mA
Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
BLOCK DIAGRAM
13
1
11
4
12
5
10
6
8
9
DP1
Q4
DP5
Q8
Q9
DP10
Q13
DP14
Q17
Q18
4
STAGES
C
4
STAGES
C
1
STAGE
C
4
STAGES
C
4
STAGES
C
1
STAGE
C
D
D
D
D
D
D
CLOCK 3
VDD
VSS
NC
= PIN 14
= PIN 7
= PIN 2
LOGIC DIAGRAM
(ONE REGISTER STAGE)
C
C
C
C
D + 1
DATA
#
*
(C)
1
2
(C)
IN
OUT
#Inverter used only on the first stage of
each four–stage element.
* Transmission Gate
Input to output is
(A)
(B)
An open circuit when control input 1 is “high” and control input 2 is “l(fā)ow”.
A bidirectional low impedance when control input 1 is “l(fā)ow” and control input 2 is “high”.
SEMICONDUCTOR TECHNICAL DATA
REV 3
1/94
TRUTH TABLE
(Single Stage)
L SUFFIX
CERAMIC
CASE 632
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
TA = – 55
°
to 125
°
C for all packages.
Plastic
Ceramic
SOIC
P SUFFIX
PLASTIC
CASE 646
D SUFFIX
SOIC
CASE 751A
Dn
0
1
x
C
Qn+1
0
1
Qn
X = Don’t Care