參數(shù)資料
型號(hào): MC14051BDR2
廠商: ON Semiconductor
文件頁(yè)數(shù): 1/12頁(yè)
文件大小: 0K
描述: IC MUX/DEMUX 8X1 16SOIC
標(biāo)準(zhǔn)包裝: 1
系列: 4000B
功能: 多路復(fù)用器/多路分解器
電路: SP8T
導(dǎo)通狀態(tài)電阻: 280 歐姆
電壓電源: 雙電源
電壓 - 電源,單路/雙路(±): ±3 V ~ 18 V
電流 - 電源: 360nA
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: MC14051BDR2OSDKR
Semiconductor Components Industries, LLC, 2013
February, 2013 Rev. 13
1
Publication Order Number:
MC14051B/D
MC14051B, MC14052B,
MC14053B
Analog
Multiplexers/Demultiplexers
The MC14051B, MC14052B, and MC14053B analog multiplexers
are digitallycontrolled analog switches. The MC14051B effectively
implements an SP8T solid state switch, the MC14052B a DP4T, and
the MC14053B a Triple SPDT. All three devices feature low ON
impedance and very low OFF leakage current. Control of analog
signals up to the complete supply voltage range can be achieved.
Features
Triple Diode Protection on Control Inputs
Switch Function is Break Before Make
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Analog Voltage Range (VDD VEE) = 3.0 to 18 V
Note: VEE must be v VSS
Linearized Transfer Characteristics
Lownoise 12 nV/√Cycle, f ≥ 1.0 kHz Typical
PinforPin Replacement for CD4051, CD4052, and CD4053
For 4PDT Switch, See MC14551B
For Lower RON, Use the HC4051, HC4052, or HC4053
HighSpeed CMOS Devices
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
These Devices are PbFree and are RoHS Compliant
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
DC Supply Voltage Range
(Referenced to VEE, VSS ≥ VEE)
0.5 to +18.0
V
Vin,
Vout
Input or Output Voltage Range
(DC or Transient) (Referenced to VSS for
Control Inputs and VEE for Switch I/O)
0.5 to VDD + 0.5
V
Iin
Input Current (DC or Transient)
per Control Pin
+10
mA
ISW
Switch Through Current
±25
mA
PD
Power Dissipation per Package (Note 1)
500
mW
TA
Ambient Temperature Range
55 to +125
°C
Tstg
Storage Temperature Range
65 to +150
°C
TL
Lead Temperature (8Second Soldering)
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/_C From
65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
highimpedance circuit. For proper operation, Vin and Vout should be constrained to
the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either
VSS, VEE or VDD). Unused outputs must be left open.
http://onsemi.com
MARKING
DIAGRAMS
PDIP16
P SUFFIX
CASE 648
MC1405xBCP
AWLYYWWG
SOIC16
D SUFFIX
CASE 751B
TSSOP16
DT SUFFIX
CASE 948F
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
ORDERING INFORMATION
16
1
1405xBG
AWLYWW
14
05xB
ALYWG
G
1
16
1
16
x
= 1, 2, or 3
A
= Assembly Location
WL, L
= Wafer Lot
Y
= Year
WW, W = Work Week
G or G
= PbFree Package
(Note: Microdot may be in either location)
1
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