參數(shù)資料
型號: MC14501BCP
廠商: MOTOROLA INC
元件分類: 標(biāo)準(zhǔn)邏輯
英文描述: Dual 4-Input NAND Gate, 2-Input NOR/OR Gate, 8-Input AND/NAND Gate
中文描述: SPECIALTY LOGIC CIRCUIT, PDIP16
封裝: PLASTIC, DIP-16
文件頁數(shù): 1/6頁
文件大?。?/td> 219K
代理商: MC14501BCP
MOTOROLA CMOS LOGIC DATA
Motorola, Inc. 1995
1
MC14501UB
Dual 4–Input “NAND” Gate
2–Input “NOR/OR” Gate
8–Input “AND/NAND” Gate
The MC14501UB is constructed with MOS P–channel and N–channel
enhancement mode devices in a single monolithic structure. These
complementary MOS logic gates find primary use where low power
dissipation and/or high noise immunity is desired. Additional characteristics
can be found on the Family Data Sheet.
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Logic Swing Independent of Fanout
Capable of Driving Two Low–Power TTL Loads or One Low–Power
MAXIMUM RATINGS*
(Voltages Referenced to VSS)
Symbol
Parameter
VDD
Vin, Vout
Iin, Iout
DC Supply Voltage
Value
– 0.5 to + 18.0
Unit
V
Input or Output Voltage (DC or Transient)
– 0.5 to VDD + 0.5
±
10
V
Input or Output Current (DC or Transient),
mA
Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
CIRCUIT SCHEMATIC
(5) 4
(9) 3
(7) 2
(6) 1
13 (10)
VDD
16
VSS
8
VDD
11
12
14
15
VSS
VSS
Numbers in parenthesis are for second 4–input gate.
SEMICONDUCTOR TECHNICAL DATA
REV 3
1/94
L SUFFIX
CERAMIC
CASE 620
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
TA = – 55
°
to 125
°
C for all packages.
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
LOGIC DIAGRAM
(POSITIVE LOGIC)
Plastic
Ceramic
SOIC
1
2
3
4
11
12
5
6
7
9
13
14 AND
15 NAND
10
VDD = PIN 16
VSS = PIN 8
Use Dotted Connection Externally to
Obtain 8–Input AND/NAND
NOTE: Pin 14 must not be used as an input
NOTE:
to the inverter.
相關(guān)PDF資料
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