參數(shù)資料
型號: MC145202EVK
廠商: Motorola, Inc.
英文描述: Evaluation Board Manual
中文描述: 評估板手冊
文件頁數(shù): 1/24頁
文件大小: 343K
代理商: MC145202EVK
MC145202
MOTOROLA
1
$" &
#% %"!&
Includes On–Board 64/65 Prescaler
The MC145202 is a low–voltage single–package synthesizer with serial
interface capable of direct usage up to 2.0 GHz.
The counters are programmed via a synchronous serial port which is SPI
compatible. The serial port is byte-oriented to facilitate control via an MCU. Due
to the innovative BitGrabber Plus
registers, the MC145202 may be cascaded
with other peripherals featuring BitGrabber Plus without requiring leading
dummy bits or address bits in the serial data stream. In addition, BitGrabber
Plus peripherals may be cascaded with existing BitGrabber
peripherals.
The device features a single–ended current source/sink phase detector A
output and a double–ended phase detector B output. Both phase detectors
have linear transfer functions (no dead zones). The maximum current of the
single–ended phase detector output is determined by an external resistor tied
from the Rx pin to ground. This current can be varied via the serial port.
Slew–rate control is provided by a special driver designed for the REFout pin.
This minimizes interference caused by REFout.
This part includes a differential RF input that may be operated in a
single–ended mode. Also featured are on–board support of an external crystal
and a programmable reference output. The R, A, and N counters are fully
programmable. The C register (configuration register) allows the part to be
configured to meet various applications. A patented feature allows the C
register to shut off unused outputs, thereby minimizing system noise and
interference.
In order to have consistent lock times and prevent erroneous data from being
loaded into the counters, on–board circuitry synchronizes the update of the A
register if the A or N counters are loading. Similarly, an update of the R register
is synchronized if the R counter is loading.
The double–buffered R register allows new divide ratios to be presented to
the three counters (R, A, and N) simultaneously.
Maximum Operating Frequency: 2000 MHz @ – 10 dBm
Operating Supply Current: 4 mA Nominal at 3.0 V
Operating Supply Voltage Range (VDD and VCC Pins): 2.7 to 5.5 V
Operating Supply Voltage Range of Phase Detectors (VPD Pin): 2.7 to 5.5 V
Current Source/Sink Phase Detector Output Capability: 1.7 mA @ 5.0 V
1.0 mA @ 3.0 V
Gain of Current Source/Sink Phase/Frequency Detector Controllable via
Serial Port
Operating Temperature Range: – 40 to + 85
°
C
R Counter Division Range: 1 and 5 to 8191
Dual–Modulus Capability Provides Total Division up to 262,143
High–Speed Serial Interface: 4 Mbps
OUTPUT A Pin, When Configured as Data Out, Permits Cascading of Devices
Two General–Purpose Digital Outputs — OUTPUT A: Totem–Pole (Push–Pull)
with Four Output Modes
OUTPUT B: Open–Drain
Patented Power–Saving Standby Feature with Orderly Recovery for
Minimizing Lock Times, Standby Current: 30
μ
A
Evaluation Kit Available (Part Number MC145202EVK)
See Application Note AN1253/D for Low–Pass Filter Design, and
AN1277/D for Offset Reference PLLs for Fine Resolution or Fast Hopping
BitGrabber and BitGrabber Plus are trademarks of Motorola, Inc.
Order this document
by MC145202/D
SEMICONDUCTOR TECHNICAL DATA
PIN ASSIGNMENT
F SUFFIX
SOG PACKAGE
CASE 751J
DT SUFFIX
TSSOP
CASE 948D
ORDERING INFORMATION
MC145202F
MC145202DT
SOG Package
TSSOP
fin
TEST 2
OUTPUT B
OUTPUT A
CLK
12
13
14
15
16
11
10
Din
REFin
VCC
ENB
8
7
6
5
4
3
2
1
TEST 1
Rx
GND
PDout
φ
V
φ
R
LD
REFout
9
18
19
20
17
VPD
fin
VDD
20
1
20
1
REV 3
1/98 TN98012300
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