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| 型號(hào)： | MC14527BCL |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | BCD Rate Multiplier |
| 中文描述： | 4000/14000/40000 SERIES, SYN NEGATIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, CDIP16 |
| 封裝： | CERAMIC, DIP-16 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 246K |
| 代理商： | MC14527BCL |
MOTOROLA CMOS LOGIC DATA
Motorola, Inc. 1995
1
MC14527B
The MC14527B BCD rate multiplier (DRM) provides an output pulse rate
based upon the BCD input number. For example, if 6 is the BCD input
number, there will be six output pulses for every ten input pulses. This part
may be used for arithmetic operations including multiplication and division.
Typical applications include digital filters, motor speed control and frequency
synthesizers.
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Output Clocked on the Negative Going Edge of Clock
Strobe for Inhibiting or Enabling Outputs
Enable and Cascade Inputs for Cascade Operation of Two or More
DRMs
“9” Output for the Parallel Enable Configuration and DRMs in Cascade
Clear and Set to Nine Inputs
MAXIMUM RATINGS*
Symbol
Parameter
VDD
DC Supply Voltage
Vin, Vout
Input or Output Voltage (DC or Transient)
Value
– 0.5 to + 18.0
– 0.5 to VDD + 0.5
Unit
V
V
* Maximum Ratings are those values beyond which damage to the device may occur.
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
TRUTH TABLE
(X = Don’t Care, *D = Most Significant Bit)
Lead Temperature (8–Second Soldering)
260
C
Inputs
Output
Logic Level
Number of Pulses
D*
C
B
A
No. of
Clock
Pulses
Ein
0
0
Strobe
Cascade
Clear
Set
Out
Out
Eout
1
1
“9”
0
0
0
0
0
0
0
1
10
10
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
0
0
1
0
1
0
1
0
10
10
10
10
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
3
4
5
6
2
3
4
5
6
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
0
0
0
0
1
0
0
1
1
1
0
1
0
1
10
10
10
10
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
8
9
8
9
7
8
9
8
9
1
1
1
1
1
1
1
1
1
1
1
1
1
1
X
1
1
1
1
X
0
0
1
1
X
0
1
0
1
X
10
10
10
10
10
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
9
8
9
—
8
9
8
9
—
1
1
1
1
—
1
1
1
1
—
X
X
1
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
10
10
10
10
10
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
1
0
0
0
0
0
1
0
1
1
0
1
1
1
1
0
1
1
0
0
1
10
0
0
10
1
1
SEMICONDUCTOR TECHNICAL DATA
REV 3
1/94
L SUFFIX
CERAMIC
CASE 620
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBDW
TA = – 55
°
to 125
°
C for all packages.
Plastic
Ceramic
SOIC
P SUFFIX
PLASTIC
CASE 648
DW SUFFIX
SOIC
CASE 751G
BLOCK DIAGRAM
4
12
11
9
10
14
15
2
3
13
7
6
5
1
A
B
C
D
ST
CLOCK
CASC
Ein
S
CLEAR
Eout
OUT
OUT
“9”
MULTIPLIER
RATE INPUT
VDD = PIN 16
VSS = PIN 8
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