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參數(shù)資料
| 型號(hào)： | MC14549BCPG |
| 廠商： | ON Semiconductor |
| 文件頁(yè)數(shù)： | 6/9頁(yè) |
| 文件大小： | 0K |
| 描述： | IC REGISTER 8BIT APPROX 16-DIP |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 系列： | 4000B |
| 邏輯類型： | 逐次近似寄存器 |
| 輸出類型： | 標(biāo)準(zhǔn) |
| 元件數(shù)： | 1 |
| 每個(gè)元件的位元數(shù)： | 8 |
| 功能： | 通用 |
| 電源電壓： | 3 V ~ 18 V |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 16-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 16-DIP |
| 包裝： | 管件 |
MC14549B, MC14559B
http://onsemi.com
6
TYPICAL APPLICATIONS
Externally Controlled 6Bit ADC (Figure 2)
Several features are shown in this application:
Shortening of the register to six bits by feeding the
seventh output bit into the FF input.
Continuous conversion, if a continuous signal is applied
to SC.
Externally controlled updating (the start pulse must be
shorter than the conversion cycle).
The EOC output indicating that the parallel data are
valid and that the serial output is complete.
Continuously Cycling 8Bit ADC (Figure 3)
This ADC is running continuously because the EOC
signal is fed back to the SC input, immediately initiating a
new cycle on the next clock pulse.
Continuously Cycling 12Bit ADC (Figure 4)
Because each successive approximation register (SAR)
has a capability of handling only an eightbit word, two
must be cascaded to make an ADC with more than eight bits.
When it is necessary to cascade two SAR’s, the second
SAR must have a stable resettable state to remain in while
awaiting a subsequent start signal. However, the first stage
must not have a stable resettable state while recycling,
because during switchon or due to outside influences, the
first stage has entered a reset state, the entire ADC will
remain in a stable nonfunctional condition.
This 12bit ADC is continuously recycling. The serial as
well as the parallel outputs are updated every thirteenth
clock pulse. The EOC pulse indicates the completion of the
12bit conversion cycle, the end of the serial output word,
and the validity of the parallel data output.
Figure 2. Externally Controlled 6Bit ADC
TO DAC
SC
C
Sout
Q7 Q6
Q5
MC14559B
Q4
Q3
Q2
Q1
Q0
EOC
FF
Figure 3. Continuously Cycling 8Bit ADC
TO DAC
SC
C
Sout
Q7 Q6
Q5
MC14559B
Q4
Q3
Q2
Q1
Q0
EOC
FF
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