參數(shù)資料
型號(hào): MC33389CDH
廠商: MOTOROLA INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: System Basis Chip with Low Speed Fault Tolerant CAN
中文描述: DATACOM, INTERFACE CIRCUIT, PDSO20
封裝: POWER, HSOP-20
文件頁(yè)數(shù): 12/35頁(yè)
文件大?。?/td> 609K
代理商: MC33389CDH
MC33389
12
MC33389
V
bat
is monitored for undervoltage and overvoltage.
V
bat
Undervoltage
V
bat
is monitored for undervoltage, if it is below 4V the
BatFail flag is set in the VSSR register and a maskable
interrupt is sent to the microcontroller.
V
bat
Overvoltage
When V
bat
is > 20V, the BatHigh flag is set in the VSSR
register. A maskable interrupt is sent to the microcontroller.
No specific action is taken to reduce current consumption (to
limit power dissipation). This is to let the entire flexibility at the
microcontroller for decision.
CAN Transceiver
The device incorporates a low speed 125kBaud CAN
physical interface. Its electrical parameters for the CANL,
CANH, Rtl,Rth,RX and TX pins are identical to the MC33388,
standalone CAN physical interface.
The mode control for the CAN transceiver (normal, V
bat
standby, sleep, etc...) are selectable through the MC33389
SPI interface.
Baud Rate up to 125kBit/s
Supports unshielded bus wires
Short-circuit proof to Battery and Ground in 12V powered
systems
Supports single-wire transmission modes with Ground offset
voltages up to 1.5V
Automatic switching to single wire mode in case of Bus failures
Automatic reset to differential mode if bus failure is removed
Low EMI due to built in slope control and signal symmetry.
Fully integrated receiver filters
Thermally protected
Bus lines protected against Automotive transients.
Low Current BusStandby mode with wake-up capability
via the Bus.
An unpowered node does not disturb the bus lines.
Figure 7. CAN Simplified Block Diagram
CAN Transceiver Description
The CAN transceiver is an interface between CAN
protocol controller and the physical bus. It is intended for low
speed applications up to 125kBit/s in passenger cars. It
Termination
Protection
RX
TX
CAN
CAN
RTH
RTL
VDD2
SPI
Transmitter
Receiver
- Fail detect
VDD2
VBAT
CAN Transceiver Register
Drivers
CAN transceiver simplified block diagramm
provides differential transmission capability, but will switch in
error condition to single wire transmitter and/or receiver.
The rise and fall slopes are limited to reduce RFI. This
allows use of an unshielded twisted pair or a parallel pair of
wires for the bus. It supports transmission capability on either
bus wire if one of the bus wire is corrupted. The logic failure
detection automatically selects a suitable transmission mode.
In normal operation (no wiring failures), the differential bus
state is output to RX. The differential receiver inputs are
connected to CANH and CANL through integrated filters. The
filtered inputs signals are also used for the single wire
receivers. The CANH and CANL receivers have threshold
voltages that assure maximum noise margin in single wire
modes. In the RXOnly mode, the transmitter is disabled but
the receive part of the transceiver remains active. In this
mode, RX reports bus and TX activity (RX = TX or Bus
dominant). Failure detection and management is the same as
BusNormal mode.
Failure Detector
The failure detector is active in RXTX and RXOnly
operation mode and detects the following single bus failures
and switches to an appropriate mode.
1- CANH wire interrupted
2- CANL wire interrupted or shorted to 5V
3- CANH short-circuited to battery
4- CANL short-circuited to ground
5- CANH short-circuited to ground
6- CANL short-circuited to battery
7- CANL mutually shorted to CANH
8- CANH to V2 (5V)
Note : Shorts-circuit failures are detected for 0 to 50
shorts.
The differential receiver (CANH-CANL) threshold is set at -
2.8V, this assures a proper reception in the normal operating
modes. In case of failures 1, 2 and 5 the on-going message is not
destroyed due to noise margin
Failures 3 and 6 are detected by comparators respectively
connected to CANH and CANL. If the comparator threshold is
exceeded for a certain time, the reception is switched to single
wire mode. This time is needed to avoid false triggering by
external RF fields. Recovery from these failures is detected
automatically after a certain time-out (filtering).
Failures 4 and 7 initially result in a permanent dominant
level at RX. After a time out, the CANL driver and the RTL pin
are switched off, only a weak pull up at CANL remains.
Reception continues by switching to single wire mode through
CANH. When the failures 4 or 7 are removed, the recessive
bus levels are restored. If the differential voltage remains
below the recessive threshold for a certain time, reception and
transmission switch back to the differential mode.
If any of the 8 wiring failure occurs, a flag is set in the
TESRH and TESRL status registers. 8 different types of errors
are distinguished out of these 8 errors and are separately
stored in these register (See SPI Register Description Section
on page 21). A maskable interrupt is sent to the microcontroller. On
error recovery, the corresponding flag is reset after read-out
operation.
During all single wire transmissions, the EMC
performance (both immunity and emission) is worse than in
differential mode. Integrated receiver filters suppress any HF
noise induced into the bus wires. The cut-off frequency of
these filters is a compromise between propagation delay and
HF suppression. In single wire mode, low frequency noise can
not be distinguished from the wanted signal.
For More Information On This Product,
Go to: www.freescale.com
F
Freescale Semiconductor, Inc.
n
.
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